AT91SAM7SE256B-AUR Atmel, AT91SAM7SE256B-AUR Datasheet - Page 123
AT91SAM7SE256B-AUR
Manufacturer Part Number
AT91SAM7SE256B-AUR
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7SE256-AU.pdf
(673 pages)
Specifications of AT91SAM7SE256B-AUR
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
SAM7SE256
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
88
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
AT91SAM7SE256B
Supply Current (max)
60 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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20.2.5
20.2.5.1
20.2.5.2
6222F–ATARM–14-Jan-11
Device Operations
Flash Read Command
Flash Write Command
Several commands on the Flash memory are available. These commands are summarized in
Table 20-3 on page
face running several read/write handshaking sequences.
When a new command is executed, the previous one is automatically achieved. Thus, chaining
a read command after a write automatically flushes the load buffer in the Flash.
This command is used to read the contents of the Flash memory. The read command can start
at any valid address in the memory plane and is optimized for consecutive reads. Read hand-
shaking can be chained; an internal address buffer is automatically increased.
Table 20-6.
This command is used to write the Flash contents.
The Flash memory plane is organized into several pages. Data to be written are stored in a load
buffer that corresponds to a Flash memory page. The load buffer is automatically flushed to the
Flash:
Step
1
2
3
6
7
...
n
n+1
n+2
n+3
n+4
n+5
...
• before access to any page other than the current one
• when a new command is validated (MODE = CMDE)
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Read Command
120. Each command is driven by the programmer through the parallel inter-
SAM7SE512/256/32 Preliminary
MODE[3:0]
CMDE
ADDR0
ADDR1
DATA
DATA
...
ADDR0
ADDR1
ADDR2
ADDR3
DATA
DATA
...
DATA[15:0]
READ
32-bit Memory Address First byte
32-bit Flash Address
*Memory Address++
*Memory Address++
...
32-bit Memory Address First byte
32-bit Flash Address
32-bit Flash Address
32-bit Flash Address Last Byte
*Memory Address++
*Memory Address++
...
123
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