UJA1061TW/5V0/C/T/ NXP Semiconductors, UJA1061TW/5V0/C/T/ Datasheet - Page 12

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UJA1061TW/5V0/C/T/

Manufacturer Part Number
UJA1061TW/5V0/C/T/
Description
IC CAN/LIN FAIL-SAFE HS 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of UJA1061TW/5V0/C/T/

Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Applications
Automotive Networking
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
2
Supply Voltage (max)
27 V, 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA, 25 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935288866512
NXP Semiconductors
9. Limiting values
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
TDA8922C_1
Product data sheet
Symbol
I
T
T
T
V
V
V
V
V
I
V
ORM
q(tot)
V
stg
amb
j
MODE
OSC
I
PROT
ESD
PWM(p-p)
Limiting values
Parameter
voltage difference
repetitive peak output current
storage temperature
ambient temperature
junction temperature
voltage on pin MODE
voltage on pin OSC
input voltage
voltage on pin PROT
electrostatic discharge voltage Human Body Model (HBM)
total quiescent current
peak-to-peak PWM voltage
Fig 7.
Stereo operation: to avoid acoustical phase differences, the inputs should be in
anti-phase and the speakers should be connected in anti-phase. This configuration:
– minimizes power supply peak current
– minimizes supply pumping effects, especially at low audio frequencies
Mono BTL operation: the inputs must be connected in anti-parallel. The output of one
channel is inverted and the speaker load is connected between the two outputs of the
TDA8922C. In practice (because of the OCP threshold) the output power can be
boosted to twice the output power that can be achieved with the single-ended
configuration.
The input configuration for a mono BTL application is illustrated in
Input configuration for mono BTL application
Conditions
V
maximum output current limiting
referenced to SGND
referenced to SGND
pins IN1P, IN1M, IN2P and IN2M
referenced to voltage on pin VSSD
Charged Device Model (CDM)
Operating mode; no load; no filter
no RC-snubber network connected
on pins OUT1 and OUT2
V
in
DD
Rev. 01 — 7 September 2009
IN1M
IN2M
V
IN1P
IN2P
SS
; Standby, Mute modes
power stage
OUT1
OUT2
mbl466
2
75 W class-D power amplifier
SGND
Min
-
6
-
0
0
0
-
-
55
40
5
2000
500
TDA8922C
Figure
© NXP B.V. 2009. All rights reserved.
Max
65
-
+150
+85
150
6
SGND + 6 V
+5
12
+2000
+500
70
120
7.
12 of 40
Unit
V
A
V
V
V
V
V
mA
V
C
C
C

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