UJA1061TW/5V0/C/T/ NXP Semiconductors, UJA1061TW/5V0/C/T/ Datasheet - Page 17

• Manufacturer Part Number: UJA1061TW/5V0/C/T/
• Description: IC CAN/LIN FAIL-SAFE HS 32HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1061TW/5V0/C/T/

• Package / Case: 32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
• Applications: Automotive Networking
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Mounting Type: Surface Mount
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 2
• Supply Voltage (max): 27 V, 52 V
• Supply Voltage (min): 5.5 V
• Supply Current (max): 10 mA, 25 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935288866512

NXP Semiconductors
13. Application information
TDA8922C_1
Product data sheet
13.3.1 Single-Ended (SE)
13.1 Mono BTL application
13.2 Pin MODE
13.3 Estimating the output power
When using the power amplifier in a mono BTL application, the inputs of the two channels
must be connected in anti-parallel and the phase of one of the inputs must be inverted;
(see
two single-ended demodulation filters.
To ensure a pop noise-free start-up, an RC time-constant must be applied to pin MODE.
The bias-current setting of the VI converter input is directly related to the voltage on pin
MODE. In turn the bias-current setting of the VI converters is directly related to the DC
output offset voltage. A slow dV/dt on pin MODE results in a slow dV/dt for the DC output
offset voltage, ensuring a pop noise-free transition between Mute and Operating modes. A
time-constant of 500 ms is sufficient to guarantee pop noise-free start-up; see
Figure 5
Maximum output power:
Maximum output current is internally limited to 6 A:
Where:
Remark: Note that I
current through the load and the ripple current. The value of the ripple current is
dependent on the coil inductance and the voltage drop across the coil.
P
I
o peak
•
•
•
•
•
•
o 0.5%
P
R
R
R
t
f
w(min)
osc
Figure
o(0.5 %)
L
DSon(hs)
s(L)
: load impedance
: oscillator frequency
: series impedance of the filter coil
=
and
=
: minimum pulse width (typical 100 ns, temperature dependent)
0.5 V
----------------------------------------------------------------------------------------------------- -
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -
7). In principle, the loudspeaker can be connected between the outputs of the
: output power at the onset of clipping
--------------------------------------------------------
R
: high-side R
Figure 8
L
+
DD
R
DSon hs
R
o(peak)
–
Rev. 01 — 7 September 2009
L
V
for more information.
R
+
SS
L
R
DSon
should be less than 6 A
DSon hs
+
R
1 t
of power stage output DMOS (temperature dependent)
s L
–
w min
+
R
0.5 V
s L
0.5 f
DD
2R
L
–
osc
V
SS
(Section
2
1 t
–
75 W class-D power amplifier
8.3.2). I
w min
o(peak)
TDA8922C
0.5 f
© NXP B.V. 2009. All rights reserved.
osc
is the sum of the
2
Figure
17 of 40
4,
(1)
(2)