AD6620AS Analog Devices Inc, AD6620AS Datasheet - Page 25

• Manufacturer Part Number: AD6620AS
• Description: IC DGTL RCVR SIGNAL PROC 80-PQFP
• Manufacturer: Analog Devices Inc

Specifications of AD6620AS

• Rohs Status: RoHS non-compliant
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 80-MQFP, 80-PQFP
• Mounting Type: *
• Applications: -

The set of plots below (Figure 39) represents a decimation of 32
in the CIC5 filter. It can be seen that the lobes of the filter drop
as the decimation rate increases, but the aliased frequencies
increase due to the reduction of the output rate.
RAM COEFFICIENT FILTER
The final signal processing stage is a sum-of-products decimat-
ing filter with programmable coefficients. Figure 40 shows a
simplified block diagram. The data memories I-RAM and Q-RAM
store the 256 most recent complex samples from the previous filter
stage with 18-bit resolution. The coefficient memory, C-RAM,
stores up to 256 coefficients with 20-bit resolution. On each
CLK cycle one tap for I and one tap for Q is calculated using
the same coefficients. The I and Q accumulators provide 3 bits
of headroom. This headroom allows the output of the RCF filter
to contain 23 significant bits.
–100
–120
–100
–120
–20
–40
–60
–80
–20
–40
–60
–80
–0.3
–0.5
0
0
Q
–0.4 –0.3 –0.2
I
IN
IN
–0.2
256 18b
256 20b
256 18b
Q-RAM
C-RAM
–0.1
I-RAM
–0.1
f/f
f/f
SAMP5
SAMP
0
0
0.1
0.1
0.2
0.3
I
Q
OUT
0.2
OUT
0.4
0.3
0.5
The maximum number of taps this filter can calculate, N
given by the equation below. The value N
ten to the AD6620 internal address space at address 30C hex.
The decimation ratio of this filter, M
from 1 to 32. The input rate into the RCF is f
to two for Diversity Channel Real Input mode; otherwise N
The RCF coefficients are located in addresses 0x000 to 0x0FF
and are interpreted as 20-bit twos complement numbers. When
writing the coefficient RAM, the lower addresses will be multi-
plied by relatively older data from the CIC5 and the higher
coefficient addresses will be multiplied by relatively newer data
from the CIC5. The coefficients need not be symmetric and the
coefficient length, N
are symmetric, then both sides of the impulse response must be
written into the coefficient RAM.
The RCF stores the data from the CIC5 into a 256 × 36 RAM.
256 × 18 is assigned to I data and 256 × 18 is assigned to Q data.
The RCF uses the RAM as a circular buffer, so that it is difficult
to know in which address a particular data element is stored. To
avoid start-up transients due to undefined data RAM values, the
data RAM should be cleared upon initialization. The RCF
utilizes the number of data RAM locations equal to N
rounded up to the nearest even number, starting from address
0x100, so these are the only values that need be cleared.
When the RCF is triggered to calculate a filter output, it starts
by multiplying the oldest value in the data RAM by the first
coefficient (located by the RCF
This value is accumulated with the products of newer data words
multiplied by the subsequent locations in the coefficient RAM
until the coefficient address RCF
Coefficient Address
0
1
2 (N
The output rate of this filter is determined by the output rate of
the CIC5 stage and MRCF.
RCF Coefficient Address Offset
This register at address 30b hex allows the AD6620 to hold
multiple filters in the RAM. However, the sum of the taps
required may not exceed 256 divided by the number of chan-
nels. The RCF will compute the filter from RCF_OFFSET to
(RCF_OFFSET + N
select which of the filters is used without requiring coefficients
be rewritten.
TAPS
– 1)
N
TAPS
Table V. Three-Tap Filter
TAPS
≤
TAPS
min
, may be even or odd. If the coefficients
f
SAMPR
Impulse Response
h(0)
h(1)
h(2)
). A single access can then be used to



f
CLK
OFF
=
OFF
f
f
M
SAMP
N
SAMP
register in address 0x30B).
×
RCF
CH
RCF
+ N
M
5
5
RCF
, may be programmed
TAPS
TAPS
,
SAMP5
–1 is reached.
256
minus 1 is writ-
AD6620



. N
Data
n(0) Newest
n(1)
n(2) Oldest
TAPS
CH
is equal
TAPS
CH
× N
= 1.
CH
, is
,