S1D13743F00A200 Epson, S1D13743F00A200 Datasheet - Page 61
S1D13743F00A200
Manufacturer Part Number
S1D13743F00A200
Description
LCD Drivers LCD CNTRL w/Embedded 464KB SRAM
Manufacturer
Epson
Datasheet
1.S1D13743F00A200.pdf
(134 pages)
Specifications of S1D13743F00A200
Maximum Clock Frequency
33 MHz, 68.59 MHz
Operating Supply Voltage
1.5 V
Maximum Operating Temperature
+ 85 C
Package / Case
QFP-20-144
Attached Touch Screen
No
Maximum Supply Current
74 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Epson Research and Development
Vancouver Design Center
bit 6
Hardware Functional Specification
Issue Date: 2010/05/18
Note
Note
Double Buffer Enable
This bit is used in conjunction with the Window Data Type bit (REG[36h] bit 7) and con-
trols the Double Buffer architecture. Double buffering is intended to prevent visual tearing
when updating the display from streaming input sources. This bit must be set before the
window data is written, as the window coordinates will be latched internally to be used by
the display pipe during display cycles.
When this bit = 0, the double buffer architecture is disabled.
When this bit =1, the double buffer architecture is enabled. This feature is only available if
the memory size resulting from the display size and color depth will fit within the 1/2 the
allowable size for the display buffer.
For a summary of Window Data Type / Double Buffer options, see Table 10-11: “Window
Data Type / Buffer Selection,” on page 60.
While double buffering is enabled, the window coordinates should not be modified.
Only one window can be double-buffered. All other windows are single buffered.
Revision 2.7
X70A-A-001-02
S1D13743
Page 61
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