WM8985GEFL Wolfson Microelectronics, WM8985GEFL Datasheet - Page 3

• Manufacturer Part Number: WM8985GEFL
• Description: Audio CODECs Multimedia CODEC with Class D HP
• Manufacturer: Wolfson Microelectronics

Specifications of WM8985GEFL

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Production Data
DESCRIPTION ....................................................................................................... 1
FEATURES............................................................................................................. 1
APPLICATIONS ..................................................................................................... 1
BLOCK DIAGRAM ................................................................................................. 2
PIN CONFIGURATION ........................................................................................... 5
ORDERING INFORMATION .................................................................................. 5
PIN DESCRIPTION ................................................................................................ 6
ABSOLUTE MAXIMUM RATINGS ......................................................................... 7
RECOMMENDED OPERATING CONDITIONS ..................................................... 7
ELECTRICAL CHARACTERISTICS ...................................................................... 8
POWER CONSUMPTION .................................................................................... 15
AUDIO PATHS OVERVIEW ................................................................................. 16
SIGNAL TIMING REQUIREMENTS ..................................................................... 17
INTERNAL POWER ON RESET CIRCUIT .......................................................... 21
DEVICE DESCRIPTION ....................................................................................... 27
REGISTER MAP ................................................................................................... 92
DIGITAL FILTER CHARACTERISTICS ............................................................. 112
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TERMINOLOGY .......................................................................................................... 14
SYSTEM CLOCK TIMING ........................................................................................... 17
AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 17
AUDIO INTERFACE TIMING – SLAVE MODE ............................................................ 18
CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 19
CONTROL INTERFACE TIMING – 2-WIRE MODE .................................................... 20
RECOMMENDED POWER UP/DOWN SEQUENCE .................................................. 23
INTRODUCTION ......................................................................................................... 27
INPUT SIGNAL PATH ................................................................................................. 28
ANALOGUE TO DIGITAL CONVERTER (ADC) .......................................................... 38
INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 43
LIMITER MODE ........................................................................................................... 46
OUTPUT SIGNAL PATH ............................................................................................. 55
3D STEREO ENHANCEMENT .................................................................................... 62
ANALOGUE OUTPUTS ............................................................................................... 63
DIGITAL AUDIO INTERFACES ................................................................................... 76
AUDIO SAMPLE RATES ............................................................................................. 81
MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ............................................... 81
COMPANDING ............................................................................................................ 83
GENERAL PURPOSE INPUT/OUTPUT ...................................................................... 86
OUTPUT SWITCHING (JACK DETECT) ..................................................................... 87
CONTROL INTERFACE .............................................................................................. 88
RESETTING THE CHIP .............................................................................................. 89
POWER SUPPLIES .................................................................................................... 89
POWER MANAGEMENT ............................................................................................ 90
POP MINIMISATION ................................................................................................... 91
REGISTER BITS BY ADDRESS ................................................................................. 94
TERMINOLOGY ........................................................................................................ 112
DAC FILTER RESPONSES ....................................................................................... 113
ADC FILTER RESPONSES ....................................................................................... 113
HIGHPASS FILTER ................................................................................................... 114
5-BAND EQUALISER ................................................................................................ 115
TABLE OF CONTENTS
PD, Rev 4.6, July 2009
WM8985
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