WM8985GEFL Wolfson Microelectronics, WM8985GEFL Datasheet - Page 90
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WM8985GEFL
Manufacturer Part Number
WM8985GEFL
Description
Audio CODECs Multimedia CODEC with Class D HP
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8985GEFL.pdf
(121 pages)
Specifications of WM8985GEFL
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Manufacturer
Quantity
Price
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Manufacturer:
TAIYO
Quantity:
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Part Number:
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Manufacturer:
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WM8985
POWER MANAGEMENT
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SAVING POWER BY REDUCING OVERSAMPLING RATE
Table 48 ADC and DAC Oversampling Rate Selection
LOW POWER MODE
Table 49 DSP Core Low Power Mode Control
Table 50 DSP Core Low Power Modes for ADC Only and DAC Only Modes
The default mode of operation of the ADC and DAC digital filters is in 64x oversampling mode.
Under the control of ADCOSR128 and DACOSR128 the oversampling rate may be doubled. 64x
oversampling results in a slight decrease in noise performance compared to 128x but lowers the
power consumption of the device.
If only DAC or ADC functionality is required, the WM8985 can be put into a low power mode. In this
mode, the DSP core runs at half of the normal rate, reducing digital power consumption of the core
by half. For DAC low power only, 3D enhancement with 2-Band equaliser functionality is permitted,
where only Band 1 (low shelf) and Band 5 (high shelf) can be used. For ADC low power, the
equaliser and 3D cannot be used.
There are 3 modes of low power operation, as detailed below. The device will not enter low power
unless in one of these register configurations, regardless of M128ENB.
For pop-free operation of the device it is recommended to change the M128ENB low power
functionality only when both the DACs and ADCs are disabled, i.e. when DACENL=0, DACENR=0,
ADCENL=0 and ADCENR=0.
R10 (0Ah)
DAC control
R14 (0Eh)
ADC control
R7 (07h)
Additional Ctrl
ADC low power
DAC low power
REGISTER
REGISTER
FUNCTION
ADDRESS
ADDRESS
3
3
8
M128ENB
ADCENL
ADCENR
DACENL
DACENR
EQ3DMODE
M128ENB
ADCENL
ADCENR
DACENL
DACENR
REGISTER BITS
BIT
BIT
DACOSR128
ADCOSR128
M128ENB
LABEL
LABEL
0
1
1
0
0
1 (DAC path)
0
0
0
1
1
SETTING
0
0
0
DEFAULT
DEFAULT
Either or both of ADCENL and
ADCENR must be set (mono or
stereo mode)
Either or both of DACENL and
DACENR must be set (mono or
stereo mode)
EQ3DMODE = 0: EQ in ADC path
EQ3DMODE = 1: EQ in DAC path
DAC oversample rate select
0 = 64x (lowest power)
1 = 128x (best SNR)
ADC oversample rate select
0 = 64x (lowest power)
1 = 128x (best SNR)
0 = low power mode enabled
1 = low power mode disabled
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD, Rev 4.6, July 2009
Production Data
90