WM8985GEFL Wolfson Microelectronics, WM8985GEFL Datasheet - Page 92

• Manufacturer Part Number: WM8985GEFL
• Description: Audio CODECs Multimedia CODEC with Class D HP
• Manufacturer: Wolfson Microelectronics

Specifications of WM8985GEFL

• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DEC HEX
10
11
12
13
14
15
16
18
19
20
21
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23
24
25
27
28
29
30
32
33
34
35
36
37
38
39
41
42
43
WM8985
w
B[15:9]
0
1
2
3
4
5
6
7
8
9
ADDR
REGISTER MAP
0A
0B
0C
0D
0E
0F
1B
1C
1D
1E
2A
2B
00
01
02
03
04
05
06
07
08
09
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
29
Software Reset
Power manage’t 1
Power manage’t 2
Power manage’t 3
Audio Interface
Companding ctrl
Clock Gen ctrl
Additional ctrl
GPIO Stuff
Jack detect control
DAC Control
Left DAC digital Vol
Right DAC dig’l Vol
Jack Detect Control
ADC Control
Left ADC Digital Vol
Right ADC Digital
Vol
EQ1 – low shelf
EQ2 – peak 1
EQ3 – peak 2
EQ4 – peak 3
EQ5 – high shelf
Class D Control
DAC Limiter 1
DAC Limiter 2
Notch Filter 1
Notch Filter 2
Notch Filter 3
Notch Filter 4
ALC control 1
ALC control 2
ALC control 3
Noise Gate
PLL N
PLL K 1
PLL K 2
PLL K 3
3D control
OUT4 to ADC
Beep control
REGISTER
NAME
EQ3DMODE
CLASSDEN
ALCMODE
ROUT1EN
M128ENB
GPIO1GP GPIO1GPU GPIO1GPD
OUT4EN
CLKSEL
EQ2BW
EQ3BW
EQ4BW
DACVU
DACVU
HPFEN
ADCVU
ADCVU
LIMEN
BYPL2
RMIX
NFU
NFU
NFU
NFU
BCP
B8
0
0
0
0
0
0
0
0
0
0
ALCSEL[1:0]
OUT4_2ADCVOL[2:0]
LOUT1EN
OUT4MIX
OUT3EN ROUT2EN LOUT2EN
HPFAPP
BYPR2
NFEN
LMIX
LRP
B7
EN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MCLKDIV[2:0]
OUT3MIX
SLEEP
JD_EN
MUTE
SOFT
B6
EN
DCLKDIV[3:0]
0
0
0
ALCHLD[3:0]
ALCDCY[3:0]
0
0
0
0
LIMDCY[3:0]
JD_EN1[3:0]
EQ1C[1:0]
EQ2C[1:0]
EQ3C[1:0]
EQ4C[1:0]
EQ5C[1:0]
WL
HPFCUT[2:0]
LIMLVL[2:0]
OUT4_2
BOOST
PLLEN
ENR
WL8
LNR
B5
OPCLKDIV[1:0]
0
0
0
0
0
0
JD_SEL
Software reset
ALCMAX[2:0]
PLLK[17:9]
PLLK[8:0]
MICBEN
PLLPRE
BOOST
SCALE
ENL
DAC_COMP[1:0]
B4
DACRVOL[7:0]
ADCRVOL[7:0]
DACLVOL[7:0]
ADCLVOL[7:0]
0
0
0
0
0
0
0
FMT
BCLKDIV[2:0]
GPIO1POL
NFA0[13:7]
NFA1[13:7]
DACOSR
ADCOSR
NFA0[6:0]
NFA1[6:0]
RMIXEN
BIASEN
INPGA
NGEN
ENR
128
128
B3
0
0
0
PLLK[23:18]
10
DLRSWAP ALRSWAP
POBCTRL
EQ1G[4:0]
EQ2G[4:0]
EQ3G[4:0]
EQ4G[4:0]
EQ5G[4:0]
BUFIOEN
INPPGA
LMIXEN
AMUTE
SR[2:0]
ENL
ADC_COMP[1:0]
B2
LIMBOOST[3:0]
DEPTH3D[3:0]
0
0
0
ALCATK[3:0]
ALCLVL[3:0]
JD_EN0[3:0]
LIMATK[3:0]
PLLN[3:0]
GPIO1SEL[2:0]
ALCMIN[2:0]
DACRPOL DACLPOL
ADCRPOL ADCLPOL
NGTH[2:0]
ADCENR
DACENR
B1
VMIDSEL[1:0]
0
0
0
0
0
PD, Rev 4.6, July 2009
SLOWCLK
ADCENL
DACENL
Production Data
MONO
LOOP
BACK
B0
MS
EN
0
0
0
0
DEF’T
(HEX)
VAL
0FF
0FF
0FF
0FF
12C
02C
02C
02C
02C
00B
00C
0E9
000
000
000
050
000
140
080
000
000
000
000
100
008
032
000
000
000
000
000
038
032
000
008
093
000
000
000
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