WM8985GEFL Wolfson Microelectronics, WM8985GEFL Datasheet - Page 80

Audio CODECs Multimedia CODEC with Class D HP

WM8985GEFL

Manufacturer Part Number
WM8985GEFL
Description
Audio CODECs Multimedia CODEC with Class D HP
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8985GEFL

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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WM8985
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Table 44 Clock Control
The CLKSEL bit selects the internal source of the Master clock from the PLL (CLKSEL=1) or from
MCLK (CLKSEL=0). When the internal clock is switched from one source to another using the
CLKSEL bit, the clock originally selected must generate at least one falling edge after CLKSEL has
changed for the switching of clocks to be successful.
EXAMPLE:
If the PLL is the current source of the internal clock (CLKSEL=1) and it is required to switch to the
MCLK, change CLKSEL to select MCLK (CLKSEL=0) and then disable PLL (PLLEN=0).
R6 (06h)
Clock
Generation
Control
REGISTER
ADDRESS
0
4:2
7:5
8
BIT
MS
BCLKDIV
MCLKDIV
CLKSEL
LABEL
0
000
010
1
DEFAULT
Sets the chip to be master over LRC
and BCLK
0 = BCLK and LRC clock are inputs
1 = BCLK and LRC clock are outputs
generated by the WM8985 (MASTER)
Configures the BCLK output frequency,
for use when the chip is master over
BCLK.
000 = divide by 1 (BCLK=SYSCLK)
001 = divide by 2 (BCLK=SYSCLK/2)
010 = divide by 4 (BCLK=SYSCLK/4)
011 = divide by 8 (BCLK=SYSCLK/8)
100 = divide by 16 (BCLK=SYSCLK/16)
101 = divide by 32 (BCLK=SYSCLK/32)
110 = reserved
111 = reserved
Sets the scaling for SYSCLK clock
output (under control of CLKSEL)
000 = divide by 1 (LRC=SYSCLK/128)
001 = divide by 1.5 (LRC=SYSCLK/192)
010 = divide by 2 (LRC=SYSCLK/256)
011 = divide by 3 (LRC=SYSCLK/384)
100 = divide by 4 (LRC=SYSCLK/512)
101 = divide by 6 (LRC=SYSCLK/768)
110 = divide by 8 (LRC=SYSCLK/1024)
111 = divide by 12 (LRC=SYSCLK/1536)
Controls the source of the clock for all
internal operation:
0 = MCLK
1 = PLL output
DESCRIPTION
PD, Rev 4.6, July 2009
Production Data
80

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