S29GL256P11TFI020 Spansion Inc., S29GL256P11TFI020 Datasheet - Page 24
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S29GL256P11TFI020
Manufacturer Part Number
S29GL256P11TFI020
Description
Flash 3V 256Mb Mirrorbit lowest address110ns
Manufacturer
Spansion Inc.
Datasheet
1.S29GL128P11TFI020.pdf
(80 pages)
Specifications of S29GL256P11TFI020
Memory Type
NOR
Memory Size
256 Mbit
Access Time
110 ns
Data Bus Width
8 bit, 16 bit
Architecture
Uniform
Interface Type
Page-mode
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
50 mA
Mounting Style
SMD/SMT
Operating Temperature
+ 85 C
Package / Case
TSOP-56
Memory Configuration
128K X 16
Ic Interface Type
Parallel
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
SPANSION
Quantity:
5 530
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
SPANSION
Quantity:
5 530
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
Spansion
Quantity:
135
7.7
24
7.7.1
Program/Erase Operations
Single Word Programming
These devices are capable of several modes of programming and or erase operations which are described in
detail in the following sections.
During a write operation, the system must drive CE# and WE# to V
command, and data. Addresses are latched on the last falling edge of WE# or CE#, while data is latched on
the 1st rising edge of WE# or CE#.
The Unlock Bypass feature allows the host system to send program commands to the Flash device without
first writing unlock cycles within the command sequence. See
function.
Note the following:
Single word programming mode is one method of programming the Flash. In this mode, four Flash command
write cycles are used to program an individual Flash address. The data for this programming operation could
be 8 or 16-bits wide.
While the single word programming method is supported by most Spansion devices, in general Single Word
Programming is not recommended for devices that support Write Buffer Programming. See
on page 69
When the Embedded Program algorithm is complete, the device then returns to the read mode and
addresses are no longer latched. The system can determine the status of the program operation by reading
the DQ status bits. Refer to
When the Embedded Program algorithm is complete, the device returns to the read mode.
The system can determine the status of the program operation by reading the DQ status bits. Refer to the
Write Operation Status on page 36
An “0” cannot be programmed back to a “1.” A succeeding read shows that the data is still “0.”
Only erase operations can convert a “0” to a “1.”
Any commands written to the device during the Embedded Program/Erase are ignored except the
Suspend commands.
Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program operation is in
progress.
A hardware reset and/or power removal immediately terminates the Program/Erase operation and the
Program/Erase command sequence should be reinitiated once the device has returned to the read mode
to ensure data integrity.
Programming is allowed in any sequence and across sector boundaries for single word programming
operation. See
Programming to the same word address multiple times without intervening erases is permitted.
During programming, any command (except the Suspend Program command) is ignored.
The Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a program operation is in
progress.
A hardware reset immediately terminates the program operation. The program command sequence should
be reinitiated once the device has returned to the read mode, to ensure data integrity.
Programming to the same address multiple times continuously (for example, “walking” a bit within a word)
is permitted.
for the required bus cycles and
Write Buffer Programming on page 26
Write Operation Status on page 36
S29GL-P MirrorBit
for information on these status bits.
Figure 7.1
D a t a
®
Flash Family
for the flowchart.
S h e e t
when using the write buffer.
Section 7.7.8
for information on these status bits.
IL
and OE# to V
S29GL-P_00_A12 November 20, 2009
for details on the Unlock Bypass
IH
when providing address,
Table 12.1