S29GL256P11TFI020 Spansion Inc., S29GL256P11TFI020 Datasheet - Page 43
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S29GL256P11TFI020
Manufacturer Part Number
S29GL256P11TFI020
Description
Flash 3V 256Mb Mirrorbit lowest address110ns
Manufacturer
Spansion Inc.
Datasheet
1.S29GL128P11TFI020.pdf
(80 pages)
Specifications of S29GL256P11TFI020
Memory Type
NOR
Memory Size
256 Mbit
Access Time
110 ns
Data Bus Width
8 bit, 16 bit
Architecture
Uniform
Interface Type
Page-mode
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
50 mA
Mounting Style
SMD/SMT
Operating Temperature
+ 85 C
Package / Case
TSOP-56
Memory Configuration
128K X 16
Ic Interface Type
Parallel
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
TSOP
No. Of Pins
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
SPANSION
Quantity:
5 530
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
SPANSION
Quantity:
5 530
Company:
Part Number:
S29GL256P11TFI020
Manufacturer:
Spansion
Quantity:
135
8.1
8.2
November 20, 2009 S29GL-P_00_A12
Lock Register
Persistent Protection Bits
As shipped from the factory, all devices default to the persistent mode when power is applied, and all sectors
are unprotected, unless otherwise chosen through the DYB ordering option (see
on page
Programming (setting to “0”) any one of the following two one-time programmable, non-volatile bits locks the
part permanently in that mode:
For programming lock register bits refer to
Notes
After selecting a sector protection method, each sector can operate in any of the following three states:
These states are controlled by the bit types described in
The Persistent Protection Bits are unique and nonvolatile for each sector and have the same endurances as
the Flash memory. Preprogramming and verification prior to erasure are handled by the device, and therefore
do not require system monitoring.
Notes
Lock Register Persistent Protection Mode Lock Bit (DQ1)
Lock Register Password Protection Mode Lock Bit (DQ2)
1. If the password mode is chosen, the password must be programmed before setting the
2. After the Lock Register Bits Command Set Entry command sequence is written, reads and writes
3. If both lock bits are selected to be programmed (to zeros) at the same time, the operation aborts.
4. Once the Password Mode Lock Bit is programmed, the Persistent Mode Lock Bit is permanently
1. Constantly locked. The selected sectors are protected and can not be reprogrammed unless PPB
2. Dynamically locked. The selected sectors are protected and can be altered via software
3. Unlocked. The sectors are unprotected and can be erased and/or programmed.
1. Each PPB is individually programmed and all are erased in parallel.
2. While programming PPB for a sector, array data can be read from any other sector, except Sector
3. Entry command disables reads and writes for the sector selected.
4. Reads within that sector return the PPB status for that sector.
5. All Reads must be performed using the read mode.
6. The specific sector address (A25-A16 GL01GP, A24-A16 GL512P, A23-A16 GL256P, A22-A16
7. If the PPB Lock Bit is set, the PPB Program or erase command does not execute and times-out
Don’t Care
corresponding lock register bit.
for Sector 0 are disabled, while reads from other sectors are allowed until exiting this mode.
disabled, and no changes to the protection scheme are allowed. Similarly, if the Persistent Mode
Lock Bit is programmed, the Password Mode is permanently disabled.
lock bit is cleared via a password, hardware reset, or power cycle.
commands.
0 (used for Data# Polling) and the sector in which sector PPB is being programmed.
GL128P) are written at the same time as the program command.
without programming or erasing the PPB.
DQ15-3
9). The device programmer or host system must then choose which sector protection method to use.
D a t a
Password Protection Mode
S29GL-P MirrorBit
Lock Bit
S h e e t
DQ2
Table 8.1 Lock Register
Table 12.2 on page 70
®
Flash Family
Section 8.2–Section
Persistent Protection Mode
and
Lock Bit
DQ1
Table 12.4 on page
8.5.
Ordering Information
Secured Silicon Sector
72.
Protection Bit
DQ0
43