LFEC3E-5TN144C Lattice, LFEC3E-5TN144C Datasheet - Page 161
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LFEC3E-5TN144C
Manufacturer Part Number
LFEC3E-5TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-5TN144C
Number Of Logic Blocks
384
Number Of Macrocells
3100
Number Of Programmable I/os
97
Data Ram Size
56320
Delay Time
5 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
3100
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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© 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
February 2008
Revision History
November 2004
August 2004
June 2004
Date
Version
01.0
01.1
01.3
Ordering Information
Ordering Information
Pinout Information
DC & Switching
DC & Switching
Characteristics
Characteristics
Architecture
Architecture
Introduction
Introduction
Section
—
LatticeECP/EC Family Data Sheet
Initial release.
Added new device LFECP/LFEC33 in Table 1-1.
Added New device LFECP/LFEC33 in Tables 2-9, 2-10 and 2-11.
Added New device LFECP/LFEC33 on Supply current (Standby) tables.
Added New device LFECP/LFEC33 on Initialization Supply current
tables.
Added 33K Logic Capacity Device in Part Number Description section.
Added EC33, ECP33 device: Industrial and Commercial to Part Number
table.
Corrected I/O counts in the part number tables for 100/144 TQFP and
208 PQFP packages to match Table 1-1 on page 1.
Changed DDR333 (166MHz) to DDR400 (200MHz)
Added “RSDS” offering to the Features list: Flexible I/O Buffer
Added information about Secondary Clock Sources
Added information about DCS
Added a section on “Recommended Power-up Sequence”
Updated Figure 2-24 “DQS Routing”
Added DSP Block performance numbers to Table 2-11
Added another row for RSDS in Table 2-13 and Table 2-14
Updated new timing numbers
Added numbers to derating table
Added DC conditions to RSDS table
Changed LVDS Max. V
Added a row for RSDS in “Operating Condition” table
Updated standby and initialization current table
Added figure 3-12: sysConfig SPI port sequence
Added DDR Timing Table and DDR Timings Figure 3-6
Added LFECP/EC6 to Pin Information
Added LFECP/EC6 to Power Supply and NC Connections
Added LFECP/EC6 144 TQFP Logic Signal Connections
Added LFECP/EC6 208 PQFP Logic Signal Connections
Added LFECP/EC6 256 fpBGA Logic Signal Connections
Added LFECP/EC6 484 fpBGA Logic Signal Connections
Added 33K Logic Capacity Device in Part Number Description section.
Added Part Number table for Commercial EC33.
Added Part Number table for Commercial ECP33.
Added Part Number table for Industrial EC33.
Added Part Number table for Industrial ECP33.
7-1
CCIO
Change Summary
to 2.625
Revision History
Data Sheet DS1000
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