LFEC3E-5TN144C Lattice, LFEC3E-5TN144C Datasheet - Page 44
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LFEC3E-5TN144C
Manufacturer Part Number
LFEC3E-5TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-5TN144C
Number Of Logic Blocks
384
Number Of Macrocells
3100
Number Of Programmable I/os
97
Data Ram Size
56320
Delay Time
5 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
3100
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
LVDS25E
The top and bottom side of LatticeECP/EC devices support LVDS outputs via emulated complementary LVCMOS
outputs in conjunction with a parallel resistor across the driver outputs. The scheme shown in
Figure 3-1 is one possible solution for point-to-point signals.
Figure 3-1. LVDS25E Output Termination Example
Table 3-1. LVDS25E DC Conditions
VCCIO = 2.5V (±5%)
VCCIO = 2.5V (±5%)
V
V
V
V
Z
OH
OL
OD
BACK
CM
Parameter
ON-chip
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
OFF-chip
CAT16-LV4F12
RS=165 ohms
(±1%)
RS=165 ohms
(±1%)
Bourns
Transmission line, Zo = 100 ohm differential
Description
RD = 140 ohms
(±1%)
3-8
DC and Switching Characteristics
Typical
LatticeECP/EC Family Data Sheet
RD = 100 ohms
(±1%)
1.42
1.08
0.35
1.25
100
OFF-chip ON-chip
Units
V
V
V
V
Ω
+
-
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