LFEC3E-5TN144C Lattice, LFEC3E-5TN144C Datasheet - Page 75
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LFEC3E-5TN144C
Manufacturer Part Number
LFEC3E-5TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-5TN144C
Number Of Logic Blocks
384
Number Of Macrocells
3100
Number Of Programmable I/os
97
Data Ram Size
56320
Delay Time
5 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
3100
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LFEC1, LFEC3 Logic Signal Connections: 100 TQFP (Cont.)
Number
Pin
51*
41
42
43
44
45
46
47
48
49
50
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
PROGRAMN
Function
VCCIO3
VCCIO2
PR10B
PR10A
PB11A
PB11B
PB12B
PB13A
PB13B
PB14A
PB14B
PB15B
PB16B
PB17B
PT17B
PT17A
PT14B
PT14A
PT13A
PT12B
PT12A
DONE
GND3
GND4
GND2
CFG2
CFG1
CFG0
CCLK
PR9B
PR9A
PR8B
PR8A
PR7B
PR7A
INITN
PR5B
PR5A
PR2B
VCC
GND
Pin
Bank
4
4
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
1
1
1
1
1
1
1
-
-
-
LFEC1
LVDS
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_IN_A
Dual Function
DOUT/CSON
BUSY/SISPI
DI/CSSPIN
PCLKC2_0
PCLKT2_0
VREF1_4
D0/SPID7
D2/SPID5
D1/SPID6
D3/SPID4
D4/SPID3
D5/SPID2
D6/SPID1
D7/SPID0
VREF1_2
BDQS14
TDQS14
CSN
4-9
PROGRAMN
Function
VCCIO3
VCCIO2
PR14B
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
PB19A
PB19B
PB20B
PB21A
PB21B
PB22A
PB22B
PB23B
PB24B
PB25B
PT25B
PT25A
PT22B
PT22A
PT21A
PT20B
PT20A
DONE
GND3
GND4
GND2
CFG2
CFG1
CFG0
CCLK
INITN
PR9B
PR9A
PR2B
VCC
GND
Pin
LatticeECP/EC Family Data Sheet
Bank
4
4
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
1
1
1
1
1
1
1
-
-
-
LFEC3
LVDS
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
Pinout Information
RLM0_PLLC_FB_A
RLM0_PLLT_FB_A
RLM0_PLLC_IN_A
RLM0_PLLT_IN_A
Dual Function
DOUT/CSON
BUSY/SISPI
DI/CSSPIN
PCLKC2_0
PCLKT2_0
VREF1_4
D0/SPID7
D2/SPID5
D1/SPID6
D3/SPID4
D4/SPID3
D5/SPID2
D6/SPID1
D7/SPID0
VREF1_2
BDQS22
TDQS22
CSN
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