LFEC3E-5TN144C Lattice, LFEC3E-5TN144C Datasheet - Page 66
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFEC3E-5TN144C
Manufacturer Part Number
LFEC3E-5TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-5TN144C
Number Of Logic Blocks
384
Number Of Macrocells
3100
Number Of Programmable I/os
97
Data Ram Size
56320
Delay Time
5 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
3100
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Switching Test Conditions
Figure 3-21 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 3-6.
Figure 3-21. Output Test Load, LVTTL and LVCMOS Standards
Table 3-6. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
T
3-30
188Ω
R
∞
1
CL*
0pF
0pF
C
L
Test Point
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.15
- 0.15
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
—
—
—
—
—
OH
OH
OL
OL
T
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