LFSC3GA25E-7FN900C Lattice, LFSC3GA25E-7FN900C Datasheet - Page 59

• Manufacturer Part Number: LFSC3GA25E-7FN900C
• Description: FPGA - Field Programmable Gate Array 25.4K LUTs 378 3G SERDES 1.2V -7 Spd
• Manufacturer: Lattice

Specifications of LFSC3GA25E-7FN900C

• Number Of Macrocells: 25000
• Number Of Programmable I/os: 132 to 942
• Data Ram Size: 1916928
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 0.95 V
• Package / Case: FPBGA-900
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: *
• Number Of I /o: *
• Number Of Gates: *
• Voltage - Supply: *
• Mounting Type: *
• Operating Temperature: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LatticeSC/M Family Timing Adders (Continued)
GTLPLUS15
GTL12
Output Adjusters
LVDS
RSDS
BLVDS25
MLVDS25
LVPECL33
HSTL18_I
HSTL18_II
HSTL18D_I
HSTL18D_II
HSTL15_I
HSTL15_II
HSTL15D_I
HSTL15D_II
SSTL33_I
SSTL33_II
SSTL33D_I
SSTL33D_II
SSTL25_I
SSTL25_II
SSTL25D_I
SSTL25D_II
SSTL18_I
SSTL18_II
SSTL18D_I
SSTL18D_II
LVTTL33_8mA
LVTTL33_16mA
LVTTL33_24mA
LVCMOS33_8mA
LVCMOS33_16mA
LVCMOS33_24mA
LVCMOS25_4mA
LVCMOS25_8mA
LVCMOS25_12mA
LVCMOS25_16mA
LVCMOS25_OD
LVCMOS18_4mA
LVCMOS18_8mA
Buffer Type
GTLPLUS15
GTL12
LVDS
RSDS
BLVDS
MLVDS
LVPECL
HSTL_18 class I
HSTL_18 class II
Differential HSTL 18 class I
Differential HSTL 18 class II
HSTL_15 class I
HSTL_15 class II
Differential HSTL 15 class I
Differential HSTL 15 class II
SSTL_3 class I
SSTL_3 class II
Differential SSTL_3 class I
Differential SSTL_3 class II
SSTL_2 class I
SSTL_2 class II
Differential SSTL_2 class I
Differential SSTL_2 class II
SSTL_2 class I
SSTL_2 class II
Differential SSTL_2 class I
Differential SSTL_2 class II
LVTTL 8mA drive
LVTTL 16mA drive
LVTTL 24mA drive
LVCMOS 3.3 8mA drive
LVCMOS 3.3 16mA drive
LVCMOS 3.3 24mA drive
LVCMOS 2.5 4mA drive
LVCMOS 2.5 8mA drive
LVCMOS 2.5 12mA drive
LVCMOS 2.5 16mA drive
LVCMOS 2.5 open drain
LVCMOS 1.8 4mA drive
LVCMOS 1.8 8mA drive
Over Recommended Operating Conditions at VCC = 1.2V +/- 5%
Description
-0.334
-0.346
-0.012
-0.013
-0.063
-0.129
-0.059
-0.346
-0.012
-0.174
-0.278
-0.073
0.708
0.708
0.132
0.132
0.096
0.208
0.096
0.208
0.133
0.173
0.133
0.173
0.215
0.277
0.215
0.277
0.238
0.238
0.094
0.145
0.073
-0.11
-0.11
Min.
0.24
0.24
0.16
0.16
0
3-15
-7
-0.017
-0.071
-0.181
-0.165
-0.165
-0.025
-0.054
-0.125
-0.099
-0.078
0.854
0.854
0.059
0.209
0.176
0.209
0.176
0.172
0.131
0.172
0.131
0.177
0.247
0.177
0.247
0.125
0.181
0.125
0.181
0.081
0.081
0.004
-0.18
-0.18
-0.18
-0.18
Max.
0.05
0.15
0.15
0
-0.218
DC and Switching Characteristics
-0.007
-0.136
-0.057
-0.325
-0.496
-0.099
-0.496
-0.218
-0.099
-0.195
-0.312
-0.078
0.012
0.856
0.856
0.153
0.268
0.153
0.268
0.112
0.233
0.112
0.233
0.164
0.164
0.239
0.311
0.239
0.311
0.179
0.263
0.179
0.263
0.107
0.162
0.081
Min.
0.11
0.11
0
LatticeSC/M Family Data Sheet
-6
-0.048
-1.389
-0.296
-0.321
-0.296
-0.321
-0.081
-0.115
-0.084
0.004
1.021
1.021
0.069
0.096
0.255
0.255
0.198
0.203
0.198
0.203
0.166
0.253
0.166
0.253
0.228
0.284
0.228
0.284
0.173
0.244
0.173
0.244
0.002
0.096
0.063
-0.32
-0.32
Max.
0.24
0.24
0
-0.136
-0.646
-0.325
-0.646
-0.054
-0.315
-0.185
-0.325
-0.185
-0.215
-0.345
-0.083
0.037
0.056
1.005
1.005
0.175
0.298
0.175
0.298
0.129
0.259
0.129
0.259
0.088
0.156
0.088
0.156
0.264
0.345
0.264
0.345
0.199
0.295
0.199
0.295
0.181
0.091
Min.
0.12
0
-5
-0.032
-2.598
-0.428
-0.463
-0.428
-0.463
-0.131
-0.089
0.024
1.189
1.189
0.083
0.133
0.272
0.333
0.272
0.333
0.224
0.275
0.224
0.275
0.154
0.258
0.154
0.258
0.331
0.387
0.331
0.387
0.265
0.338
0.265
0.338
0.216
0.179
-0.46
-0.46
-0.09
Max.
0
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns