LFSC3GA25E-7FN900C Lattice, LFSC3GA25E-7FN900C Datasheet - Page 64

• Manufacturer Part Number: LFSC3GA25E-7FN900C
• Description: FPGA - Field Programmable Gate Array 25.4K LUTs 378 3G SERDES 1.2V -7 Spd
• Manufacturer: Lattice

Specifications of LFSC3GA25E-7FN900C

• Number Of Macrocells: 25000
• Number Of Programmable I/os: 132 to 942
• Data Ram Size: 1916928
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 0.95 V
• Package / Case: FPBGA-900
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: *
• Number Of I /o: *
• Number Of Gates: *
• Voltage - Supply: *
• Mounting Type: *
• Operating Temperature: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Timing Diagrams
PFU Timing Diagrams
Figure 3-4. Slice Single/Dual Port Write Cycle Timing
Notes:
• Rising Edge for latching WREN, WAD and DATAIN.
• WREN must continue past falling edge clock.
• Data output occurs on negative edge.
Figure 3-5. Slice Single/Dual Port Read Cycle Timing
WRE
DO
CK
AD
WRE
DO
CK
AD
DI
Old Data
Old Data
AD
AD
D
3-20
D
D
DC and Switching Characteristics
LatticeSC/M Family Data Sheet