SI5364-H-BL Silicon Laboratories Inc, SI5364-H-BL Datasheet - Page 8

• Manufacturer Part Number: SI5364-H-BL
• Description: IC CLK MULT SONET/SDH 99-PBGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5364-H-BL

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5364
8
Table 3. AC Characteristics
(V
Parameter
Input Clock Frequency (non FEC)
FEC[1:0] = 00
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
Input Clock Frequency (forward
FEC)
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
Input Clock Frequency (reverse
FEC)
FEC[1:0] = 10
(CLKIN_A, CLKIN_B, REF/
CLKIN_F)
Input Clock Rise Time (CLKIN_A,
CLKIN_B, REF/CLKIN_F)
Input Clock Fall Time (CLKIN_A,
CLKIN_B, REF/CLKIN_F)
Input Clock Duty Cycle
Frequency Difference at which
Frequency Offset Alarm (FOS_A,
FOS_B) is declared
(CLKIN_A vs. REF/CLKIN_F,
CLKIN_B vs. REF/CLKIN_F)
SMC/S3N = 1 (SONET Min. Clock)
SMC/S3N = 0 (Stratum 3/3E)
CLKOUT[3:0] Frequency Range
FRQSEL[1:0] = 00 (no output)
FRQSEL[1:0] = 01 (1X)
FRQSEL[1:0] = 10 (8X)
FRQSEL[1:0] = 11 (32X)
CLKOUT_[3:0] Rise Time
CLKOUT_[3:0] Fall Time
Output Clock Duty Cycle
*Note: The Si5364 provides a 1, 8, or 32x clock frequency multiplication function with an option for additional frequency
DD33
*
*
= 3.3 V ±5%, T
FEC[1:0] = 01
scaling by a factor of 255/238 or 238/255 for FEC rate compatibility.
A
= –20 to 85 °C)
*
*
C
C
Symbol
DUTY_OU
DUTY_IN
f
f
f
f
f
Δ f
f
CLKIN
CLKIN
CLKIN
O_155
O_622
O_19
t
t
t
FOS
t
T
R
R
F
F
(CLKOUT+) – (CLKOUT–
Figure 2; single-ended;
after 3 cm of 50 Ω FR4
Figure 2; single-ended;
after 3 cm of 50 Ω FR4
255/238 FEC Scaling
238/255 FEC Scaling
Rev. 2.5
No FEC Scaling
Test Condition
Stratum3/3E
Differential:
Figure 2
Figure 2
stripline
stripline
SMC
)
19.436
18.140
20.824
19.436
155.48
621.95
Min
9.2
40
40
48
—
—
—
—
—
Typ
187
176
—
—
—
—
—
50
—
—
—
—
—
—
—
21.093
19.687
22.600
21.093
168.75
675.0
Max
16.6
260
260
11
11
60
72
52
—
±ppm
±ppm
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ps
ps
%
%