74AUP1G09GW,125 NXP Semiconductors, 74AUP1G09GW,125 Datasheet - Page 10

IC GATE AND LP 2INPUT TSSOP5

74AUP1G09GW,125

Manufacturer Part Number
74AUP1G09GW,125
Description
IC GATE AND LP 2INPUT TSSOP5
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G09GW,125

Product
AND
Number Of Gates
1
Propagation Delay Time
4.9 ns, 5.9 ns, 6.5 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5391-2
NXP Semiconductors
13. Package outline
Fig 9.
74AUP1G09
Product data sheet
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
Package outline SOT353-1 (TSSOP5)
VERSION
OUTLINE
SOT353-1
max.
1.1
A
0.1
A 1
0
1
5
1.0
0.8
A 2
y
IEC
e
Z
0.15
A 3
e 1
D
0.30
0.15
b p
0
b p
4
3
All information provided in this document is subject to legal disclaimers.
MO-203
0.25
0.08
JEDEC
c
w
REFERENCES
M
2.25
1.85
D
(1)
scale
1.5
Rev. 2 — 9 July 2010
1.35
1.15
E
(1)
SC-88A
JEITA
0.65
e
c
3 mm
e 1
1.3
A 2
Low-power 2-input AND gate with open-drain
A 1
2.25
H E
2.0
H E
E
0.425
detail X
L
0.46
0.21
L p
L
L p
A
PROJECTION
EUROPEAN
(A 3 )
0.3
v
X
v
74AUP1G09
M
θ
0.1
w
A
A
0.1
© NXP B.V. 2010. All rights reserved.
y
ISSUE DATE
00-09-01
03-02-19
0.60
0.15
Z
(1)
SOT353-1
θ
10 of 18

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