74AUP1G09GW,125 NXP Semiconductors, 74AUP1G09GW,125 Datasheet - Page 14

IC GATE AND LP 2INPUT TSSOP5

74AUP1G09GW,125

Manufacturer Part Number
74AUP1G09GW,125
Description
IC GATE AND LP 2INPUT TSSOP5
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G09GW,125

Product
AND
Number Of Gates
1
Propagation Delay Time
4.9 ns, 5.9 ns, 6.5 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5391-2
NXP Semiconductors
Fig 13. Package outline SOT1202 (XSON6)
74AUP1G09
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
D
2
5
0.35
0.30
0.27
0
L
Rev. 2 — 9 July 2010
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
A
E
L
1
A
Low-power 2-input AND gate with open-drain
1 mm
(4×)
(2)
European
projection
74AUP1G09
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
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