74AUP1G09GW,125 NXP Semiconductors, 74AUP1G09GW,125 Datasheet - Page 11
![IC GATE AND LP 2INPUT TSSOP5](/photos/39/72/397225/tssop5_sml.jpg)
74AUP1G09GW,125
Manufacturer Part Number
74AUP1G09GW,125
Description
IC GATE AND LP 2INPUT TSSOP5
Manufacturer
NXP Semiconductors
Datasheet
1.74AUP1G09GW125.pdf
(18 pages)
Specifications of 74AUP1G09GW,125
Product
AND
Number Of Gates
1
Propagation Delay Time
4.9 ns, 5.9 ns, 6.5 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5391-2
NXP Semiconductors
Fig 10. Package outline SOT886 (XSON6)
74AUP1G09
Product data sheet
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
VERSION
OUTLINE
SOT886
max
A
0.5
(1)
max
0.04
A
terminal 1
index area
1
e
0.25
0.17
b
6×
(2)
L
1
IEC
1.5
1.4
D
1.05
0.95
1
6
E
0
e
MO-252
JEDEC
1
0.6
All information provided in this document is subject to legal disclaimers.
e
REFERENCES
D
0.5
2
5
e
1
Rev. 2 — 9 July 2010
e
0.35
0.27
1
L
JEITA
b
0.40
0.32
scale
L
3
4
1
1
A
L
1
E
Low-power 2-input AND gate with open-drain
A
4×
(2)
2 mm
PROJECTION
EUROPEAN
74AUP1G09
© NXP B.V. 2010. All rights reserved.
ISSUE DATE
04-07-15
04-07-22
SOT886
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