74AUP1G09GW,125 NXP Semiconductors, 74AUP1G09GW,125 Datasheet - Page 3

IC GATE AND LP 2INPUT TSSOP5

74AUP1G09GW,125

Manufacturer Part Number
74AUP1G09GW,125
Description
IC GATE AND LP 2INPUT TSSOP5
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G09GW,125

Product
AND
Number Of Gates
1
Propagation Delay Time
4.9 ns, 5.9 ns, 6.5 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-5
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-5391-2
NXP Semiconductors
6. Pinning information
Table 3.
7. Functional description
Table 4.
[1]
74AUP1G09
Product data sheet
Symbol
B
A
GND
Y
n.c.
V
Input
A
L
L
H
H
Fig 4.
CC
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF state.
GND
B
A
Pin configuration
SOT353-1
Pin description
Function table
1
2
3
74AUP1G09
6.1 Pinning
6.2 Pin description
001aai728
Pin
TSSOP5
1
2
3
4
-
5
[1]
5
4
V
Y
CC
B
L
H
L
H
All information provided in this document is subject to legal disclaimers.
Fig 5.
XSON6
1
2
3
4
5
6
GND
Pin configuration SOT886
Rev. 2 — 9 July 2010
B
A
Transparent top view
74AUP1G09
1
2
3
Description
data input
data input
ground (0 V)
data output
not connected
supply voltage
001aai729
6
5
4
V
n.c.
Y
Low-power 2-input AND gate with open-drain
CC
Output
Y
L
L
L
Z
Fig 6.
GND
Pin configuration SOT891,
SOT1115 and SOT1202
B
A
Transparent top view
74AUP1G09
74AUP1G09
1
2
3
© NXP B.V. 2010. All rights reserved.
001aai730
6
5
4
V
n.c.
Y
CC
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