MC13892JVL Freescale Semiconductor, MC13892JVL Datasheet - Page 59

IC PMU I.MX51/37/35/27 186MAPBGA

MC13892JVL

Manufacturer Part Number
MC13892JVL
Description
IC PMU I.MX51/37/35/27 186MAPBGA
Manufacturer
Freescale Semiconductor

Specifications of MC13892JVL

Applications
Battery Management, Display (LED Drivers), Handheld/Mobile Devices, Power Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
186-LFBGA
Output Current
65 mA
Output Voltage
1.5 V
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Package Type
BGA
Case Length
12mm
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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by software. The PCI interrupt is cleared by software or when cycling through the Off state.
appearance of a valid supply once the battery is unloaded. However, upon a restart of the IC and power sequencer, the surge of
current through the battery and trace impedances can once again cause the BP node to drop below UVDET. This chain of cyclic
power down / power up sequences is referred to as “ambulance mode”, and the power control system includes strategies to
minimize the chance of a product falling into and getting stuck in ambulance mode.
UVDET threshold. Secondly, the number of times the PCUT mode is entered is counted with the counter PCCOUNT[3:0], and
the allowed count is limited to PCMAXCNT[3:0] set through the SPI. When the contents of both become equal, then the next
PCUT will not be supported and the system will go to Off mode.
reassumes control), software should clear the PCCOUNT[3:0] counter. Counting of PCUT events is enabled via the
PCCOUNTEN bit. This mode is only supported if the power cut mode feature is enabled by setting the PCEN bit. When not
enabled, in case of a power failure, the state machine will transition to the Off state. SPI control is not possible during a PCUT
event and the interrupt line is kept low. SPI configuration for PCUT support should also include setting the PCUTEXPB=1 (see
the Silent Restart from PCUT Event section later in this chapter).
Internal MemHold Power Cut
are enabled. The backup coin cell will now supply the MC13892 core along with the 32 kHz crystal oscillator, the RTC system
and coin cell backed up registers. All regulators and switchers will be shut down to preserve the coin cell and RTC as long as
possible.
drivers, so the only recovery out of a Power Cut state is to reestablish power and initiate a Cold Start.
recovery.
SILENT RESTART FROM PCUT EVENT
restart, so the system is reinitialized without alerting the user. This can be configured by setting the PCUTEXPB bit to a “1” at
booting or after a Cold Start. This bit resets on RTCPORB, therefore any subsequent Cold Start can first check the status of
PCUTEXPB and the PCI bit. The PCUTEXPB is cleared to “0” when transitioning from PCUT to Off. If there was a PCUT interrupt
and PCUTEXPB is still a “1”, then the state machine has not transitioned through Off, which confirms that the PCT timer has not
expired during the PCUT event (i.e., a successful power cut). In case of a successful power cut, a silent restart may be
appropriate.
expired before power was reestablished, flagging an unsuccessful power cut or first power up, so the startup user greeting may
be desirable for playback.
SILENT SYSTEM RESTART WITH WDI EVENT
reset, but it is desired to make the reset a silent event so as to happen without end user awareness. The default response to WDI
going low is for the state machine to transition to the Off state (when WDIRESET = 0). However, if WDIRESET = 1, the state
machine will go to Cold Start without passing through Off mode
is unrelated to PCUTs, but it shares the PCUT counter so that the number of silent system restarts can be limited by the
programmable PCMAXCNT counter.
be reset to “0” if a WDI falls and the state machine goes straight to the Cold Start state. Therefore, upon a restart, the software
can detect a silent system restart, if there is a WDIRESETI interrupt and PCUTEXPB = 1. The application may then determine
that an inconspicuous restart without showing may be more appropriate than launching into the welcoming routine.
Analog Integrated Circuit Device Data
Freescale Semiconductor
In order to distinguish a non-PCUT initiated Cold Start from a Cold Start after a PCUT, the PCI interrupt should be checked
Because the PCUT system quickly disables all of the power tree, the battery voltage may recover to a level with the
First, the successful recovery out of a PCUT requires the BP node to rise above BPON, providing hysteretic margin from the
After a successful power up after a PCUT (i.e., valid power is reestablished, the system comes out of reset, and the processor
As described above, a momentary power interruption will put the system into the Internal MemHold Power Cut state if PCUTs
Both RESETB and RESETBMCU are tripped, bringing the entire system down along with the supplies and external clock
If the PCT timer expires before power is reestablished, the system transitions to the Off state and awaits a sufficient supply
If a short duration power cut event occurs (such as from a battery bounce, for example), it may be desirable to perform a silent
If PCUTEXPB is found to be a “0” after the Cold Start where PCI is found to be a “1”, then it is inferred that the PCT timer has
A mechanism is provided for recovery if the system software somehow gets into an abnormal state which requires a system
A WDIRESET event will generate a maskable WDIRESETI interrupt and also increment the PCCOUNT counter. This function
When PCUT support is used, the software should set the PCUTEXPB bit to “1”. Since this bit resets with RTCPORB, it will not
A PCUT event does not trip the WDIRESETI bit.
FUNCTIONAL DEVICE OPERATION
OPERATING MODES
13892
59

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