STM32W108B-SK STMicroelectronics, STM32W108B-SK Datasheet - Page 126

• Manufacturer Part Number: STM32W108B-SK
• Description: STARTER KIT FOR STM32W108
• Manufacturer: STMicroelectronics
• Series: STM32r
• Type: MCUr

Specifications of STM32W108B-SK

• Featured Product: STM32 Cortex-M3 Companion Products
• Contents: Board
• Silicon Manufacturer: ST Micro
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: STM32
• Silicon Family Name: STM32W108xx
• Kit Contents: Board
• Features: IEEE
• Mfg Application Notes: STM32W108 Adjacent Channel Rejection Measurements
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

General-purpose timers
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One-pulse mode
One-pulse mode (OPM) is a special case of the previous modes. It allows the counter to be
started in response to a stimulus and to generate a pulse with a programmable length after
a programmable delay.
Starting the counter can be controlled through the slave mode controller. Generating the
waveform can be done in output compare mode or PWM mode. Select OPM by setting the
TIM_OPM bit in the TIMx_CR1 register. This makes the counter stop automatically at the
next update event.
A pulse can be correctly generated only if the compare value is different from the counter
initial value. Before starting (when the timer is waiting for the trigger), the configuration must
be:
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Figure 37. Example of one pulse mode
The direction is not updated the value written to the counter that is greater than the
auto-reload value (TIMx_CNT > TIMx_ARR). For example, if the counter was counting
up, it continues to count up.
The direction is updated if when 0 or the TIMx_ARR value is written to the counter, but
no update event is generated.
The safest way to use center-aligned mode is to generate an update by software
(setting the TIM_UG bit in the TIMx_EGR register) just before starting the counter, and
not to write the counter while it is running.
In up-counting: TIMx_CNT < TIMx_CCRy ≤ TIMx_ARR (in particular, 0 < TIMx_CCRy),
In down-counting: TIMx_CNT > TIMx_CCRy.
Doc ID 16252 Rev 8
STM32W108CB, STM32W108HB