DP83815DVNG National Semiconductor, DP83815DVNG Datasheet - Page 10

• Manufacturer Part Number: DP83815DVNG
• Description: IC, ENET CTRL 10BASET, 100MBPS, LQFP-144
• Manufacturer: National Semiconductor

Specifications of DP83815DVNG

• Data Rate: 100Mbps
• Ethernet Type: 10BASE-T
• Supply Current: 170mA
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.0 Pin Description
Clock Interface
LED Interface
Serial EEPROM Interface
Note: DP83815 supports FM93C46 for the EEPROM device.
X1
X2
LEDACTN/MA0
LED100N/MA2
LED10N/MA1
EESEL
EECLK/MA4
EEDI/MA3
EEDO/MD4
MD1/CFGDISN
Symbol
Symbol
Symbol
LQFP Pin
LQFP Pin
LQFP Pin
No(s)
No(s)
No(s)
142
144
143
128
138
133
17
18
2
1
(Continued)
LBGA Pin
LBGA Pin
LBGA Pin
No(s)
No(s)
No(s)
C14
C13
C12
G14
A12
B12
E11
F13
D8
C7
Dir
Dir
Dir
I/O
O
O
O
O
O
O
O
I
I
Crystal/Oscillator Input: This pin is the primary clock reference
input for the DP83815 and must be connected to a 25 MHz 0.005%
(50ppm) clock source. The DP83815 device supports either an
external crystal resonator connected across pins X1 and X2, or an
external CMOS-level oscillator source connected to pin X1 only.
Crystal Output: This pin is used in conjunction with the X1 pin to
connect to an external 25 MHz crystal resonator device. This pin
must be left unconnected if an external CMOS oscillator clock source
is utilized. For more information see the definition for pin X1.
TX/RX Activity: This pin is an output indicating transmit/receive
activity. This pin is driven low to indicate active transmission or
reception, and can be used to drive a low current LED (<6 mA). The
activity event is stretched to a min duration of approximately 50 ms.
100 Mb/s Link: This pin is an output indicating the 100 Mb/s Link
status. This pin is driven low to indicate Good Link status for 100
Mb/s operation, and can be used to drive a low current LED (<6 mA).
10 Mb/s Link: This pin is an output indicating the 10 Mb/s Link
status. This pin is driven low to indicate Good Link status for 10 Mb/s
operation, and can be used to drive a low current LED (<6 mA).
EEPROM Chip Select: This signal is used to enable an external
EEPROM device.
EEPROM Clock: During an EEPROM access (EESEL asserted),
this pin is an output used to drive the serial clock to an external
EEPROM device.
EEPROM Data In: During an EEPROM access (EESEL asserted),
this pin is an output used to drive opcode, address, and data to an
external serial EEPROM device.
EEPROM Data Out: During an EEPROM access (EESEL asserted),
this pin is an input used to retrieve EEPROM serial read data.
This pin has an internal weak pull up.
Configuration Disable: When pulled low at power-on time, disables
load of configuration data from the EEPROM. Use 1 KΩ to ground to
disable configuration load.
10
Description
Description
Description
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