DP83815DVNG National Semiconductor, DP83815DVNG Datasheet - Page 40

• Manufacturer Part Number: DP83815DVNG
• Description: IC, ENET CTRL 10BASET, 100MBPS, LQFP-144
• Manufacturer: National Semiconductor

Specifications of DP83815DVNG

• Data Rate: 100Mbps
• Ethernet Type: 10BASE-T
• Supply Current: 170mA
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.0 Register Set
4.2 Operational Registers
The DP83815 provides the following set of operational registers mapped into PCI memory space or I/O space. Writes to
reserved register locations are ignored. Reads to reserved register locations return undefined values.
MAC/BIU Registers
Internal Phy Registers
ECh-FCh
DCh-E0h
Offset
A0-BCh
28-2Ch
60-78h
CCh
0Ch
1Ch
3Ch
4Ch
5Ch
7Ch
8Ch
9Ch
C0h
C4h
C8h
D0h
D4h
D8h
00h
04h
08h
10h
14h
18h
20h
24h
30h
34h
40h
44h
48h
50h
54h
58h
80h
84h
88h
90h
94h
98h
E4h
E8h
(Continued)
38
PHYIDR1
PHYIDR2
Reserved
Reserved
Reserved
Reserved
ANNPTR
ANLPAR
PHYSTS
TBTSCR
PTSCR
TXCFG
RXCFG
FCSCR
PHYCR
WCSR
MEAR
BMCR
BMSR
RXDP
CCSR
RFCR
RFDR
BRAR
BRDR
ANAR
ANER
RECR
PCSR
TXDP
MICR
MIBC
MISR
Tag
CFG
PCR
IMR
SRR
MIB
ISR
IER
CR
Table 4-2 Operational Register Map
Command Register
Configuration Register
EEPROM Access Register
PCI Test Control Register
Interrupt Status Register
Interrupt Mask Register
Interrupt Enable Register
Reserved
Transmit Descriptor Pointer Register
Transmit Configuration Register
Reserved
Receive Descriptor Pointer Register
Receive Configuration Register
Reserved
CLKRUN Control/Status Register
Wake on LAN Control/Status Register
Pause Control/Status Register
Receive Filter/Match Control Register
Receive Filter/Match Data Register
Boot ROM Address
Boot ROM Data
Silicon Revision Register
Management Information Base Control Register
Management Information Base Data Registers
Reserved
Basic Mode Control Register
Basic Mode Status Register
PHY Identifier Register #1
PHY Identifier Register #2
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Auto-Negotiation Next Page TX
Reserved
PHY Status Register
MII Interrupt Control Register
MII Interrupt Status Register
Reserved
False Carrier Sense Counter Register
Receive Error Counter Register
100 Mb/s PCS Configuration and Status Register
Reserved
PHY Control Register
10Base-T Status/Control Register
Reserved
40
Description
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RW
RW
RO
RO
RO
RO
RO
RO
RO
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