DSPIC30F5011-20I/PTG Microchip Technology, DSPIC30F5011-20I/PTG Datasheet - Page 49

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DSPIC30F5011-20I/PTG

Manufacturer Part Number
DSPIC30F5011-20I/PTG
Description
IC, DSC, 16BIT, 66KB, 40MHZ 5.5V TQFP-64
Manufacturer
Microchip Technology
Series
DsPIC30Fr
Datasheet

Specifications of DSPIC30F5011-20I/PTG

Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
66KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.0
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
• Run-Time Self-Programming (RTSP)
• In-Circuit Serial Programming (ICSP)
6.1
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD, respectively), and
three other lines for Power (V
Master Clear (MCLR). This allows customers to
manufacture boards with unprogrammed devices, and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
FIGURE 6-1:
© 2008 Microchip Technology Inc.
Note:
FLASH PROGRAM MEMORY
In-Circuit Serial Programming
(ICSP)
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
User/Configuration
Space Select
ADDRESSING FOR TABLE AND NVM REGISTERS
DD
Using
Program
Counter
Using
NVMADR
Addressing
Using
Table
Instruction
), Ground (V
1/0
1/0
0
SS
) and
NVMADRU Reg
TBLPAG Reg
8 bits
8 bits
Program Counter
6.2
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions.
With RTSP, the user may erase program memory, 32
instructions (96 bytes) at a time and can write program
memory data, 32 instructions (96 bytes) at a time.
6.3
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the effective
address (EA) from a W register specified in the table
instruction, as shown in Figure 6-1.
24 bits
24-bit EA
dsPIC30F5011/5013
NVMADR Reg EA
Working Reg EA
Run-Time Self-Programming
(RTSP)
Table Instruction Operation
Summary
16 bits
16 bits
Byte
Select
0
DS70116H-page 49

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