ECOG1XE01A6 CYAN, ECOG1XE01A6 Datasheet - Page 12

• Manufacturer Part Number: ECOG1XE01A6
• Description: IC, 16BIT MCU, ECOG1X, 70MHZ, QFN-68
• Manufacturer: CYAN

Specifications of ECOG1XE01A6

• Controller Family/series: ECOG1X
• No. Of I/o's: 20
• Ram Memory Size: 8KB
• Cpu Speed: 70MHz
• No. Of Timers: 8
• Digital Ic Case Style: QFN
• Core Size: 16 Bit
• Program Memory Size: 64KB
• Embedded Interface Type: I2C, JTAG, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Version 1.15
1
12
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
The 100QFN package has a large central body contact which forms the GND pad. This is listed as pin 101.
Pin List
Description
EMAC_TXD0 / PortA_0
EMAC_TXD1 / PortA_1
EMAC_TXD2 / PortA_2
EMAC_TXD3 / PortA_3
VDD
EMAC_RXD0 / PortA_4
EMAC_RXD1 / PortA_5
EMAC_RXD2 / PortA_6
EMAC_RXD3 / PortA_7
PortK_0
PortK_1
PortK_2
PortK_3
IVDD
PortL_0
PortL_1
PortL_2
PortL_3
EMAC_CLKT / PortB_0
EMAC_CLKR / PortB_1
EMAC_RXER / PortB_2
EMAC_RXDV / PortB_3
EMAC_COL / PortB_4
VDD
VPP
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
Pin
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
eCOG1X Microcontroller Product Family
Description
EMAC_CRS / PortB_5
EMAC_TXEN / PortB_6
EMAC_TXER / PortB_7
eICE_CLOCK / JTCLK
eICE_LOADB / JTMS
eICE_MOSI / JTDI
eICE_MISO / JTDO
IVDD
ULPI_RST / PortC_0
ULPI_DIR / PortC_1
ULPI_NXT / PortC_2
ULPI_STOP / PortC_3
ULPI_DATA0 / PortM_0
ULPI_DATA1 / PortM_1
VDD
ULPI_DATA2 / PortM_2
ULPI_DATA3 / PortM_3
ULPI_DATA4 / PortM_4
ULPI_DATA5 / PortM_5
ULPI_DATA6 / PortM_6
ULPI_DATA7 / PortM_7
ULPI_CLK
USB_p
USBVDD
USB_n
Table 9: eCOG1X14B5 pin list
www.cyantechnology.com
53
63
66
67
68
69
70
72
Pin
51
52
54
55
56
57
58
59
60
61
62
64
65
71
73
74
75
Description
VDD
PortE_0
PortE_1
PortE_2
PortE_3
PortE_4
PortE_5
VDD
PortE_6
PortE_7
PortF_0
PortF_1
PortF_2
PortF_3
IVDD
PortD_0
PortD_1
PortD_2
PortD_3
PortJ_0
VDD
PortJ_1
PortJ_2
PortJ_3
nReset
Pin
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
Description
nTest
VDD
IVDD
AVDD
ADC1_Vin2
ADC1_Vin3
ADC1_Vin4
ADC1_Vin5
ADC1_Vin6
ADC1_Vin7
FIL
AVDD
Vref
DAC1
DAC2
ADC2_Vin2
ADC2_Vin3
ADC2_Vin4
ADC2_Vin5
ADC2_Vin6
AVDD
Low_XTAL_In
Low_XTAL_Out
High_XTAL_In
High_XTAL_Out
GND
1
4 August 2009