ECOG1XE01A6 CYAN, ECOG1XE01A6 Datasheet - Page 67

IC, 16BIT MCU, ECOG1X, 70MHZ, QFN-68

ECOG1XE01A6

Manufacturer Part Number
ECOG1XE01A6
Description
IC, 16BIT MCU, ECOG1X, 70MHZ, QFN-68
Manufacturer
CYAN
Datasheet

Specifications of ECOG1XE01A6

Controller Family/series
ECOG1X
No. Of I/o's
20
Ram Memory Size
8KB
Cpu Speed
70MHz
No. Of Timers
8
Digital Ic Case Style
QFN
Core Size
16 Bit
Program Memory Size
64KB
Embedded Interface Type
I2C, JTAG, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4 August 2009
Symbol
Symbol
T
t
t
t
t
t
t
N
N
t
t
CPU
DH
R1
R2
R3
DV
DS
A1
A2
DMA Mode
The tables below for the EHI function in DMA mode use the following symbols for time periods defined
by bit fields in the EHI registers.
DMA Mode - eCOG1X as master
1
2
Description
CPU clock period
EHI_ACK output active period (0..3)
EHI_ACK output inactive period (0..3)
Parameter
Delay time EHI_REQ active to EHI_ACK active
Delay time EHI_ACK active to
EHI_REQ inactive
Minimum EHI_REQ input inactive width
Minimum EHI_ACK output active width
Minimum EHI_ACK output inactive width
Delay time data output valid to EHI_ACK output active
Setup time data input valid to EHI_ACK output inactive
Hold time EHI_ACK output inactive to data input invalid
eCOG and CyanIDE are registered trademarks of Cyan Holdings plc
Figure 17: EHI DMA master write cycle timing diagram
Figure 16: EHI DMA master read cycle timing diagram
Table 34: AC characteristics - EHI DMA master mode
eCOG1X Microcontroller Product Family
Table 33: EHI clock symbols
www.cyantechnology.com
Continue next transfer (min)
Pause next transfer (max)
Definition
fd.ehi.cfg.dma_ack_act_prd1
fd.ehi.cfg.dma_ack_act_prd2
T
T
(2 x T
CPU
CPU
(T
CPU
Min
–3
13
CPU
x (N
x (N
0
0
0
x (N
) + 3
1
2
+ 1)
+ 1)
1
+ N
2
)) – 20
Max
+3
Version 1.15
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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