ADC12D040CIVS National Semiconductor, ADC12D040CIVS Datasheet - Page 8

• Manufacturer Part Number: ADC12D040CIVS
• Description: DUAL 12BIT ADC, 40MSPS, SMD, 12D040
• Manufacturer: National Semiconductor

Specifications of ADC12D040CIVS

• Resolution (bits): 12bit
• Input Channel Type: Differential
• Data Interface: Parallel
• Supply Voltage Range - Analogue: 4.75V To 5.25V
• Supply Voltage Range - Digital: 2.35V To 5.25V, 4.75V To 5.25V
• Sampling Rate: 40MSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Symbol
POWER SUPPLY CHARACTERISTICS
I
I
I
Symbol
f
f
t
t
t
t
t
t
t
t
t
t
PSRR1
A
D
DR
CLK 1
CLK 2
CH
CL
CONV
OD
AD
AJ
HOLD
DIS
EN
PD
DC and Logic Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V
+3.0V, PD = 0V, INT/EXT = V
apply for T
AC Electrical Characteristics
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = AGND = DGND DR GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V
50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
TQFP, θ
this device under normal operation will typically be about 620 mW (600 typical power consumption + 20 mW TTL output loading). The values for maximum power
dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power
supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through 0Ω.
Note 6: The 235˚C reflow temperature refers to infrared reflow. For Vapor Phase Reflow (VPR), the following Conditions apply: Maintain the temperature at the top
of the package body above 183˚C for a minimum 60 seconds. The temperature measured on the package body must not exceed 220˚C. Only one excursion above
183˚C is allowed per reflow cycle.
Note 7: The inputs are protected as shown below. Input voltage magnitudes above V
(Note 3). However, errors in the A/D conversion can occur if the input goes above V
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, V
+3.0V, PD = 0V, INT/EXT = V
apply for T
JA
is 50˚C/W, so P
Analog Supply Current
Digital Supply Current
Digital Output Supply Current
Total Power Consumption
Power Supply Rejection
Maximum Clock Frequency
Minimum Clock Frequency
Clock High Time
Clock Low Time
Conversion Latency
Data Output Delay after Rising
CLK Edge
Aperture Delay
Aperture Jitter
Clock Edge to Data Transition
Data outputs into TRI-STATE
Mode
Data Outputs Active after
TRI-STATE
Power Down Mode Exit Cycle
J
J
= T
= T
MIN
MIN
to T
to T
D
Parameter
MAX = 2.5 Watts at 25˚C and 1.3 Watts at the maximum operating ambient temperature of 85˚C. Note that the power consumption of
Parameter
MAX
MAX
: all other limits T
: all other limits T
D
D
, V
, V
JA
), and the ambient temperature, (T
REF
REF
= +2.0V, OEA, OEB = 0V, f
= +2.0V, OEA, OEB = 0V, f
J
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
J
J
= 25˚C (Notes 7, 8, 9)
PD Pin = DGND, V
PD Pin = V
PD Pin = DGND
PD Pin = V
PD Pin = DGND, C
PD Pin = V
PD Pin = DGND, C
PD Pin = V
Rejection of Full-Scale Error with
V
= 25˚C (Notes 7, 8, 9, 12)
V
A
DR
= 4.75V vs. 5.25V
= 3.0V
DR
DR
DR
DR
A
), and can be calculated using the formula P
Conditions
Conditions
8
IN
A
or below GND by more than 100 mV. As an example, if V
<
CLK
CLK
REF
L
L
AGND, or V
A
(Continued)
or below GND will not damage this device, provided current is limited per
= 0 pF (Note 14)
= 0 pF (Note 15)
= 40 MHz, t
= 40 MHz, t
= 2.0V
IN
>
V
A
r
r
), the current at that pin should be limited to 25 mA. The
= t
= t
f
f
= 3 ns, C
= 3 ns, C
(Note 10)
(Note 10)
Typical
Typical
100
500
1.2
10.5
55
10
600
9
9
2
8
4
4
93
15
16
75
56
0
0
D
MAX = (T
L
L
= 20 pF/pin. Boldface limits
= 20 pF/pin. Boldface limits
A
A
(Note 10)
= V
(Note 10)
= V
J
Limits
Limits
max - T
17.5
110
700
40
D
D
18
12
6
= +5V, V
A
= +5V, V
is 4.75V, the full-scale
A
)/θ
JA
. In the 64-pin
MHz (min)
mA (max)
mA (max)
mA (max)
ns (max)
DR
(Limits)
ns (min)
ns (min)
(Limits)
DR
Cycles
ps rms
Units
Clock
J
Units
kHz
max, the
mW
mW
mA
mA
mA
dB
ns
ns
ns
ns
ns
=
=