IS42S16400F-7TLI INTEGRATED SILICON SOLUTION (ISSI), IS42S16400F-7TLI Datasheet - Page 34

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IS42S16400F-7TLI

Manufacturer Part Number
IS42S16400F-7TLI
Description
SDRAM, IND, 4M X 16, 3V, 54TSOP2
Manufacturer
INTEGRATED SILICON SOLUTION (ISSI)
Datasheet

Specifications of IS42S16400F-7TLI

Access Time
5.4ns
Page Size
64Mbit
Memory Case Style
TSOP-2
No. Of Pins
54
Operating Temperature Range
-40°C To +85°C
Memory Type
DRAM - Synchronous
Memory Configuration
4 BLK (1M X 16)
Interface Type
LVTTL
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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IS42S16400F
IS45S16400F
CLOCK SUSPEND
Clock suspend mode occurs when a column access/burst
is in progress and CKE is registered LOW. In the clock
suspend mode, the internal clock is deactivated, “freezing”
the synchronous logic.
For each positive clock edge on which CKE is sampled
LOW, the next internal positive clock edge is suspended.
Any command or data present on the input pins at the time
Clock Suspend During WRITE Burst
Clock Suspend During READ Burst
34
INTERNAL
COMMAND
ADDRESS
CLOCK
INTERNAL
COMMAND
CKE
ADDRESS
CLK
DQ
CLOCK
CKE
CLK
DQ
READ
BANK a,
COL n
T0
NOP
T0
NOP
T1
WRITE
BANK a,
COL n
D
T1
IN
n
NOP
T2
D
OUT
T2
n
T3
of a suspended internal clock edge is ignored; any data
present on the DQ pins remains driven; and burst counters
are not incremented, as long as the clock is suspended.
(See following examples.)
Clock suspend mode is exited by registering CKE HIGH;
the internal clock and related operation will resume on the
subsequent positive clock edge.
Integrated Silicon Solution, Inc. — www.issi.com
D
T3
OUT
n+1
NOP
T4
D
NOP
IN
T4
n+1
NOP
D
T5
OUT
D
DON'T CARE
n+2
NOP
IN
T5
n+2
DON'T CARE
NOP
D
T6
OUT
n+3
07/28/2010
Rev. H

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