ST62T15CM6 STMicroelectronics, ST62T15CM6 Datasheet - Page 49

• Manufacturer Part Number: ST62T15CM6
• Description: 8BIT MCU OTP 2K, SMD, 62T15, SOIC20
• Manufacturer: STMicroelectronics

Specifications of ST62T15CM6

• Controller Family/series: ST6
• Core Size: 8bit
• No. Of I/o's: 20
• Program Memory Size: 2KB
• Ram Memory Size: 64Byte
• Cpu Speed: 8MHz
• Oscillator Type: External Only
• No. Of Timers: 1
• Digital Ic Case: RoHS Compliant
• Peripherals: ADC,
• Rohs Compliant: No
• Processor Series: ST62T1x
• Core: ST6
• Data Bus Width: 8 bit
• Program Memory Type: EPROM
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-28
• Development Tools By Supplier: ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: In Transition

8-BIT TIMER (Cont’d)
9.2.4 Functional Description
There are three operating modes, which are se-
lected by the TOUT and DOUT bits (see TSCR
register). These three modes correspond to the
two clocks which can be connected to the 7-bit
prescaler (f
the output mode.
The settings for the different operating modes are
summarized
Table 12. Timer Operating Modes
9.2.4.1 Gated Mode
(TOUT = “0”, DOUT = “1”)
In this mode, the prescaler is decremented by the
Timer clock input, but only when the signal on the
TIMER pin is held high (f
pin). See
This mode is selected by clearing the TOUT bit in
the TSCR register (i.e. as input) and setting the
DOUT bit.
Note: In this mode, if the TIMER pin is multi-
plexed, the corresponding port control bits have to
be set in input with pull-up configuration through
TOUT DOUT
0
0
1
1
0
1
0
1
Figure 28
INT
Table
Event Counter
Gated input
÷ 12 or TIMER pin signal), and to
Function
Output “0”
Output “1”
(output)
(output)
Timer
(input)
(input)
12.
and
Figure
INT
/12 gated by TIMER
External counter clock
External Pulse length
29.
measurement
Output signal
Application
generation
source
the DDR, OR and DR registers. For more details,
please refer to the I/O Ports section.
Figure 28. f
Figure 29. Gated Mode Operation
COUNTER VALUE
TIMER CLOCK
xx2
xx1
TIMER PIN
TIMER
1
VALUE 1
TIMER
f
INT
f
EXT
/12
Clock in Gated Mode
PULSE LENGTH
ST6215C/ST6225C
f
PRESCALER
VALUE 2
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