KSZ8995X Micrel Inc, KSZ8995X Datasheet - Page 29

• Manufacturer Part Number: KSZ8995X
• Description: 5 Port 10/100 Switch With PHY And Frame Buffers
• Manufacturer: Micrel Inc

Specifications of KSZ8995X

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 5
• Internal Memory Buffer Size: 64
• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII/SNI
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1642 - BOARD EVALUATION FOR KSZ8995XA
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1041

Register Map
Global Registers
December 2003
KS8995X
Decimal
0-1
2-11
12-15
16-29
30-31
32-45
46-47
48-61
62-63
64-77
78-79
80-93
94-95
96-103
104-109
Address
Register 0 (0x00): Chip ID0
7-0
Register 1 (0x01): Chip ID1/Start Switch
7-4
3-1
0
Register 2 (0x02): Global Control 0
7
6-4
3
Offset
Name
Family ID
Chip ID
Revision ID
Start switch
Reserved
802.1p base priority
Enable PHY MII
Hex
0x00-0x01
0x02-0x0B
0x0C-0x0F
0x10-0x1D
0x1E-0x2F
0x20-0x2D
0x2E-0x2F
0x30-0x3D
0x3E-0x3F
0x40-0x4D
0x4E-0x4F
0x50-0x5D
0x5E-0x5F
0x60-0x67
0x68-0x6D
Description
Chip ID Registers
Global Control Registers
Reserved
Port 1 Control Registers
Port 1 Status Registers
Port 2 Control Registers
Port 2 Status Registers
Port 3 Control Registers
Port 3 Status Registers
Port 4 Control Registers
Port 4 Status Registers
Port 5 Control Registers
Port 5 Status Registers
TOS Priority Control Registers
MAC Address Registers
1 = enable PHY MII interface
(note: if not enabled, the switch will tri-state all outputs)
Description
Chip family
0x0 is assigned to M series. (95X)
Revision ID
Reserved
Used to classify priority for incoming 802.1q packets.
“User priority” is compared against this value.
< : classified as low priority
: classified as high priority
29
Mode
RO
RO
RO
R/W
R/W
R/W
Default
0x95
0x0
0x2
0x0
0x4
Pin LED[5][1] strap
option. Pull-down
(0): isolate Pull-up
(1): Enable.
Note: LED[5][1]
has internal pull-up.
M9999-120403
Micrel