PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet - Page 112

• Manufacturer Part Number: PIC18F1230-I/SS
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1230-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: USART
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 2
• Processor Series: PIC18F
• Core: PIC
• Data Ram Size: 256 B
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

PIC18F1230/1330
13.1
Timer1 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the Clock Select
bit, TMR1CS (T1CON<1>).
FIGURE 13-1:
FIGURE 13-2:
DS39758D-page 112
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
T1OSO/T1CKI
Timer1 Operation
T1OSO/T1CKI
Data Bus<7:0>
Write TMR1L
Read TMR1L
TMR1IF
Overflow
Interrupt
Flag bit
TMR1IF
Overflow
Interrupt
Flag Bit
T1OSI
T1OSI
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM: 16-BIT READ/WRITE MODE
8
High Byte
T1OSC
TMR1H
T1OSC
Timer1
8
TMR1H
8
TMR1
TMR1
T1OSCEN
Enable
Oscillator
T1OSCEN
Enable
Oscillator
TMR1L
TMR1L
8
(1)
(1)
Clock
Internal
F
OSC
F
Internal
Clock
OSC
/4
TMR1ON
On/Off
/4
TMR1CS
When TMR1CS = 0, Timer1 increments every
instruction cycle. When TMR1CS = 1, Timer1
increments on every rising edge of the external clock
input or the Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the T1OSI and T1OSO/T1CKI pins become
inputs. That is, the corresponding TRISA bit value is
ignored, and the pins are read as ‘0’.
TMR1ON
On/Off
1
0
TMR1CS
1
0
T1CKPS1:T1CKPS0
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
T1SYNC
Prescaler
0
1
1, 2, 4, 8
2
0
1
2
 2009 Microchip Technology Inc.
Synchronized
Clock Input
Peripheral Clocks
Synchronized
Synchronize
Clock Input
Peripheral Clocks
Synchronize
det
det