PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet - Page 174

Microcontroller

PIC18F1230-I/SS

Manufacturer Part Number
PIC18F1230-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1230-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
USART
On-chip Adc
4-chx10-bit
Number Of Timers
2
Processor Series
PIC18F
Core
PIC
Data Ram Size
256 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F1230-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F1230/1330
16.1
The A/D conversion can be triggered by setting the GO/
DONE bit. This bit can either be set manually by the
programmer or by setting the SEVTEN bit of ADCON0.
When the SEVTEN bit is set, the Special Event Trigger
from the Power Control PWM module triggers the A/D
conversion. For more information, see Section 14.14
“PWM Special Event Trigger”.
16.2
For the A/D Converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 16-3. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k. After the analog input channel is
EQUATION 16-1:
EQUATION 16-2:
EQUATION 16-3:
DS39758D-page 174
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25C. Below 25C, T
T
T
ACQ
DD
C
ACQ
AMP
COFF
C
ACQ
HOLD
). The source impedance affects the offset voltage
=
=
Triggering A/D Conversions
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
) impedance varies over the device voltage
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25C)(0.02 s/C)
(85C – 25C)(0.02 s/C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k) ln(0.0004883)
1.05 s
0.2 s + 1 s + 1.2 s
2.4 s
(V
-(C
AMP
HOLD
+ T
REF
HOLD
+ T
C
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
) and the internal sampling
)(R
+ T
REF
COFF
IC
IC
+ R
COFF
/2048)) • (1 – e
+ R
HOLD
SS
SS
HOLD
+ R
+ R
) must be allowed
S
S
) ln(1/2047)
. The sampling
) ln(1/2048)
(-T
C
/C
HOLD
(R
IC
+ R
SS
+ R
S
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
To
Equation 16-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 16-3 shows the calculation of the minimum
required acquisition time, T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
))
HOLD
DD
)
Note:
calculate
on
COFF
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
the
= 0 ms.
the
=
=
=
=
following
minimum
 2009 Microchip Technology Inc.
25 pF
2.5 k
1/2 LSb
5V  R
85C (system max.)
ACQ
SS
. This calculation is
application
acquisition
= 2 k
system
time,

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