PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet - Page 120

• Manufacturer Part Number: PIC18F1230-I/SS
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1230-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: USART
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 2
• Processor Series: PIC18F
• Core: PIC
• Data Ram Size: 256 B
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

PIC18F1230/1330
14.1
The operation of the PWM module is controlled by a
total of 20 registers. Eight of these are used to
configure the features of the module:
• PWM Timer Control Register 0 (PTCON0)
• PWM Timer Control Register 1 (PTCON1)
• PWM Control Register 0 (PWMCON0)
• PWM Control Register 1 (PWMCON1)
• Dead-Time Control Register (DTCON)
• Output Override Control Register (OVDCOND)
• Output State Register (OVDCONS)
• Fault Configuration Register (FLTCONFIG)
There are also 12 registers that are configured as six
register pairs of 16 bits. These are used for the
configuration values of specific features. They are:
• PWM Time Base Registers (PTMRH and PTMRL)
• PWM Time Base Period Registers (PTPERH and
• PWM Special Event Compare Registers
• PWM Duty Cycle #0 Registers
• PWM Duty Cycle #1 Registers
• PWM Duty Cycle #2 Registers
All of these register pairs are double-buffered.
DS39758D-page 120
PTPERL)
(SEVTCMPH and SEVTCMPL)
(PDC0H and PDC0L)
(PDC1H and PDC1L)
(PDC2H and PDC2L)
Control Registers
disabled by respectively setting or clearing the PTEN bit
14.2
The PWM module supports several modes of operation
that are beneficial for specific power and motor control
applications. Each mode of operation is described in
subsequent sections.
The PWM module is composed of several functional
blocks. The operation of each is explained separately
in relation to the several modes of operation:
• PWM Time Base
• PWM Time Base Interrupts
• PWM Period
• PWM Duty Cycle
• Dead-Time Generators
• PWM Output Overrides
• PWM Fault Inputs
• PWM Special Event Trigger
14.3
The PWM time base is provided by a 12-bit timer with
prescaler and postscaler functions. A simplified block
diagram of the PWM time base is shown in Figure 14-4.
The PWM time base is configured through the PTCON0
and PTCON1 registers. The time base is enabled or
in the PTCON1 register.
Note:
Module Functionality
PWM Time Base
The PTMR register pair (PTMRL:PTMRH)
is not cleared when the PTEN bit is
cleared in software.
 2009 Microchip Technology Inc.