C40K-CDR-A Omron, C40K-CDR-A Datasheet

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C40K-CDR-A

Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C40K-CDR-A

Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Cat. No. W146-E1-5
SYSMAC
C20K/C28K/C40K/C60K
Programmable Controllers

Related parts for C40K-CDR-A

C40K-CDR-A Summary of contents

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... Cat. No. W146-E1-5 SYSMAC C20K/C28K/C40K/C60K Programmable Controllers ...

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K-type Programmable Controllers OPERATION MANUAL Revised July 1999 ...

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iv ...

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... OMRON. No patent liability is assumed with respect to the use of the information contained herein. Moreover, because OMRON is constantly striving to improve its high-quality products, the information contained in this manual is subject to change without notice ...

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vi ...

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... Relay Circuits: The Roots of PC Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 PC Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 OMRON Product Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Overview of PC Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Peripheral Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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SECTION 5 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Introduction ...

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... Section 1 Introduction explains the background and some of the basic terms used in ladder-dia- gram programming. It also provides an overview of the process of programming and operating a PC and explains basic terminology used with OMRON PCs. Descriptions of peripheral devices used with the K-types and a table of other manuals available to use with this manual for special PC applications are also provided ...

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This section provides general precautions for using the K-type Programmable Controllers (PCs) and related devices. The information contained in this section is important for the safe and reliable application of Programmable Control- lers. You must read this section and understand ...

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... It is extremely important that a PC and all PC Units be used for the specified purpose and under the specified conditions, especially in applications that can directly or indirectly affect human life. You must consult with your OMRON representative before applying a PC System to the above-mentioned applications. ...

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Application Precautions Caution Take appropriate and sufficient countermeasures when installing systems in the ! following locations: Caution The operating environment of the PC System can have a large effect on the lon- ! gevity and reliability of the system. Improper ...

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Application Precautions xiv Do not apply voltages to the Input Units in excess of the rated input voltage. Excess voltages may result in burning. Do not apply voltages or connect loads to the Output Units in excess of the maximum ...

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... Relay Circuits: The Roots of PC Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 PC Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 OMRON Product Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Overview of PC Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Peripheral Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... Relay vs. PC Terminology The terminology used throughout this manual is somewhat different from re- lay terminology, but the concepts are the same. The following table shows the relationship between relay terms and the PC terms used for OMRON PCs. 2 Relay term ...

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... OMRON products are divided into several functional groups that have ge- neric names. Appendix A Standard Models list products by these groups. The term Unit is used to refer to all OMRON PC products, depending on the context. The largest group of OMRON products is I/O Units. I/O Units come in a vari- ety of point quantities and specifications. Section 1-4 3 ...

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Overview of PC Operation Special I/O Units are dedicated Units that are designed to meet specific needs. These include Analog Timer Units and Analog I/O Units. Link Units are used to create Link Systems that link more than one PC ...

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... The following peripheral devices can be used in programming, either to input/ debug/monitor the PC program or to interface the PC to external devices to output the program or memory area data. Model numbers for all devices listed below are provided in Appendix A Standard Models . OMRON product names have been placed in bold when introduced in the following descrip- tions. ...

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... FIT does not have optical connectors, conversion to optical fiber cable is possible by using Converting Link Adapters.) Factory Intelligent Terminal: The FIT is an OMRON computer with specially designed software that allows FIT you to perform all of the operations that are available with the GPC or LSS. ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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PC Configuration 2-1 Introduction This section provides information on hardware aspects of K-type PCs that are relevant to programming and software operation. These include indica- tors on the CPU and basic PC configuration. This information is covered in detail in ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Data Area Structure 3-1 Introduction Various types of data are required to achieve effective and correct control. To facilitate managing this data, the PC is provided with various memory areas for data, each of which performs a different function. The ...

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Data Area Structure used to store execution conditions at branching points in ladder diagrams. The use of TR bits is described in Section 4 Writing and Inputting the Pro- gram. The TC area consists of TC numbers, each of which ...

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Internal Relay (IR) Area When referring to the entire word, the digit numbered 0 is called the right- most digit; the one numbered 3, the leftmost digit. When inputting data into data areas, it must be input in the proper ...

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Internal Relay (IR) Area The maximum number of available I/O bits is 16 (bits/word) times the number I/O Words of I/O words. I/O bits are assigned to input or output points as described in Word Allocations . If a Unit ...

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... K-type CPUs. Bits in the shaded areas can be used as work bits but not as output bits. 14 Model Input bits Word C20K Cannot used. 07 Word C28K Word 00 Word Cannot C40K used Word 00 Word C60K indicates words that cannot be used for I/O, but can be used as work bits. Section 3-3 Output bits Word ...

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... For example, the last CPU word address for a C40K CPU is 03 and hence the first input or output word address for any of the Expan- sion I/O Units coupled to a C40K CPU will be 04. In the tables below “n” is the last CPU word allocated as an input or output word. ...

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... There is also a restriction in the number of Units which can be included. To compute the number of Units for this restriction, add up all of the Units count- ing the C40K CPU Unit, C60K CPU Unit, C40K Expansion I/O Unit and C60K Expansion I/O Unit as two Units each and any other Units as one Unit each. ...

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... Output C4K/C16P C4P or C16P Expansion I/O Unit In/Output C20P/C28P/TU/LU, C20P Expansion I/O Unit, C28K Expansion I/O Unit, Analog Timer Unit, or I/O Link Unit Input Output C40P/C60P Input Output Input Output Section 3-3 C40K or C60K CPU Unit C40P or C60P Expansion I/O Unit 17 ...

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Internal Relay (IR) Area C20K/C28K C4K/C16P Input Output In/Output C20P/C28P/TU/LU Input C4K/C16P C4K/C16P C4K/C16P In/Output In/Output In/Output C20P/C28P/TU/LU Input Output C20P/C28P/TU/LU C4K/C16P Input Output In/Output C40P/C60P Input ...

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Internal Relay (IR) Area C20K/C28K C20P/C28P/TU/LU Input Output Input Input C20P/C28P/TU/LU C4K/C16P Output Input Output In/Output C40P/C60P Input Output C40P/C60P C4K/C16P Output Input Output In/Output Section 3-3 IR ...

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... Internal Relay (IR) Area C40K/C60K Input Output Input C40K/C60K Input Output Input C4K/C16P C4K/C16P C4K/C16P Output In/Output In/Output In/Output C20P/C28P/TU/LU Input Output Input C20P/C28P/TU/LU C4K/C16P Input Output In/Output C20P/C28P/TU/LU Output Input Output C40P/C60P Input Output Section 3 C20P/C28P/TU/LU Input Output C4K/C16P In/Output C20P/C28P/TU/LU ...

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Special Relay (SR) Area 3-4 Special Relay (SR) Area The SR area contains flags and control bits used for monitoring system op- eration, accessing clock pulses, and signalling errors. SR area word ad- dresses range from 18 through 19; bit ...

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Special Relay (SR) Area These clock pulse bits are often used with counter instructions to create tim- ers. Refer to 5-11 Timer and Counter Instructions for an example of this. ! Caution Because the 0.1-second clock pulse bit has an ...

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Timer/Counter (TC) Area Carry Flag bit 1904 turns ON when there is a carry in the result of an arithmetic op- eration. The content also used in some arithmetic operations, e.g added or ...

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Temporary Relay (TR) Area Once a TC number has been defined using one of these instructions, it can- not be redefined elsewhere in the program using the same or a different in- struction. If the same TC number is defined ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Instruction Terminology 4-1 Introduction This section explains how to convert ladder diagrams to mnemonic code and input them into the PC. It then describes the basic steps and concepts in- volved in programming and introduces the instructions used to build ...

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The Ladder Diagram Most instructions have at least one or more operands associated with them. Operands indicate or provide the data on which an instruction per- formed. These are sometimes input as the actual numeric values, but ...

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The Ladder Diagram 4-3-1 Basic Terms Normally Open and Each condition in a ladder diagram is either ON or OFF depending on the Normally Closed status of the operand bit that has been assigned to it. A normally open condi- ...

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The Ladder Diagram Program Memory Structure The program is input into addresses in Program Memory. Addresses in Pro- gram Memory are slightly different to those in other memory areas because each address does not necessarily hold the same amount of ...

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The Ladder Diagram 4-3-3 Ladder Instructions The ladder instructions are those that correspond to the conditions on the ladder diagram. Ladder instructions, either independently or in combination with the logic block instructions described next, form the execution conditions upon which ...

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The Ladder Diagram OR and OR NOT When two or more conditions lie on separate instruction lines running in par- allel and then joining together, the first condition corresponds to a LOAD or LOAD NOT instruction; the rest of the ...

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The Ladder Diagram 4-3-4 OUT and OUT NOT The OUT and OUT NOT instructions are used to control the status of the designated operand bit according to the execution condition. With the OUT instruction, the operand bit will be turned ...

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The Ladder Diagram AND LOAD Although simple in appearance, the diagram below requires an AND LOAD instruction. 0000 0002 0001 0003 The two logic blocks are indicated by dotted lines. Studying this example shows that an ON execution condition would ...

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The Ladder Diagram The following diagram requires AND LOAD to be converted to mnemonic code because three pairs of parallel conditions lie in series. The two means of coding the programs are also shown. Address Instruction 0000 LD 0001 OR ...

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The Ladder Diagram Combining AND LD and Both of the coding methods described above can also be used when using OR LD both AND LD and OR LD, as long as the number of blocks being combined does not exceed ...

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The Ladder Diagram The following diagram must be broken down into two blocks and each of these then broken into two blocks before it can be coded. As shown below, blocks a and b require an AND LD. Before AND ...

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The Ladder Diagram The following diagram requires first and an AND LD to code the top of the three blocks, and then two more OR LDs to complete the mne- monic code. 0000 0001 0002 0003 0004 ...

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The Ladder Diagram Again, this diagram can be redrawn as follows to simplify program structure and coding and to save memory space. 0006 0007 0003 0004 0005 0001 0002 Our last example may at first appear very complicated but can ...

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The Ladder Diagram 4-3-7 Coding Multiple Right-hand Instructions If there is more than one right-hand instruction executed with the same exe- cution condition, they are coded consecutively following the last condition on the instruction line. In the following example, the ...

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The Ladder Diagram There are two means of programming branching programs to preserve the execution conditions. One is to use TR bits; the other, to use interlocks (IL(02)/ILC(03)). TR Bits The TR area provides eight bits through TR ...

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The Ladder Diagram TR bits can be used as many times as required as long as the same TR bit is not used more than once in the same instruction block. Here, a new instruc- tion block is begun each ...

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The Ladder Diagram Interlocks The problem of storing execution conditions at branching points can also be handled by using the INTERLOCK (IL(02)) and INTERLOCK CLEAR (ILC(03)) instructions. The branching point and all the conditions leading to it are placed on ...

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The Ladder Diagram If 0000 in the above diagram was OFF (i.e., if the execution condition for the first INTERLOCK instruction was OFF), instructions 1 through 4 would be executed with OFF execution conditions and execution would move to the ...

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The Programming Console JUMP END instruction with a jump number of 00. Although all jumps, no status is changed and no instructions are executed between the JUMP 00 and JUMP END 00 instructions, the program must search for ...

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The Programming Console Gray Instruction and Data Except for the SHIFT key on the upper right, the gray keys are used to input Area Keys instructions and designate data area prefixes when inputting or changing a program. The SHIFT key ...

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Preparation for Operation In PROGRAM mode, the PC does not execute the program. PROGRAM mode is for creating and changing programs, clearing memory areas, and registering and changing the I/O table. A special Debug operation is also available within PROGRAM ...

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Preparation for Operation Each of these operations from entering the password on is described in detail in the following subsections. All operations should be done in PROGRAM mode unless otherwise noted. 4-5-1 Entering the Password ...

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Preparation for Operation Key Sequence All Clear The following procedure is used to clear memory completely. Partial Clear It is possible to retain the data in specified areas and/or part of the Program Memory. To retain the data in the ...

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Inputting, Modifying, and Checking the Program For example, to leave the TC area uncleared and retaining Program Memory addresses 0000 through 0122, input as follows: 4-5-3 Clearing Error Messages Any error messages recorded in memory should also be cleared. It ...

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Inputting, Modifying, and Checking the Program Before starting to input a program, check to see whether there is a program already loaded. If there is a program already loaded that you do not need, clear it first using the program ...

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Inputting, Modifying, and Checking the Program 4-6-2 Inputting or Overwriting Programs Programs can be input or overwritten only in PROGRAM mode. The same procedure is used to either input a program for the first time or to overwrite a program ...

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Inputting, Modifying, and Checking the Program Example The following ladder diagram can be input using the key inputs shown below. Displays will appear as indicated. Error Messages The following error messages may appear when inputting a program. Correct the error ...

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Inputting, Modifying, and Checking the Program 4-6-3 Checking the Program Once a program has been input, it should be checked for syntax to be sure that no programming rules have been violated. This check should also be performed if the ...

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Inputting, Modifying, and Checking the Program Message SBS UNDEFD A defined subroutine is not called by the main program. When this message is displayed because of interrupt routine definition, there is no problem. In all other cases, correct the program. ...

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Inputting, Modifying, and Checking the Program Example 4-6-5 Program Searches The program can be searched for occurrences of any designated instruction or data area bit address used in an instruction. Searches can be performed from any currently displayed address or ...

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Inputting, Modifying, and Checking the Program Example: Instruction Search Example: Bit Search 56 Section 4-6 ...

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Inputting, Modifying, and Checking the Program 4-6-6 Inserting and Deleting Instructions In PROGRAM mode, any instruction that is currently displayed can be de- leted or another instruction can be inserted before it. These are not possible in RUN or MONITOR ...

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Inputting, Modifying, and Checking the Program The following key inputs and displays show the procedure for achieving the program changes shown above. Inserting an Instruction 58 Section 4-6 Find the address prior to the insertion point Program After Insertion Address ...

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Controlling Bit Status Deleting an Instruction 4-7 Controlling Bit Status There are five instructions that can be used generally to control individual bit status. These are the OUTPUT or OUT, OUTPUT NOT or OUT NOT, DIF- FERENTIATE UP, DIFFERENTIATE DOWN, ...

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Controlling Bit Status Here, 0500 will be turned ON for one cycle after 0000 goes ON. The next time DIFU(13) 0500 is executed, 0500 will be turned OFF, regardless of the status of 0000. With the DIFFERENTIATE DOWN instruction, 0501 ...

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Work Bits (Internal Relays) 4-8 Work Bits (Internal Relays) In programming, combining conditions to directly produce execution condi- tions is often extremely difficult. These difficulties are easily overcome, how- ever, by using certain bits to trigger other instructions indirectly. Such ...

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Work Bits (Internal Relays) Reducing Complex Work bits can be used to simplify programming when a certain combination Conditions of conditions is repeatedly used in combination with other conditions. In the following example, IR 0000, IR 0001, IR 0002, and ...

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Programming Precautions Differentiated Conditions Work bits can also be used if differential treatment is necessary for some, but not all, of the conditions required for execution of an instruction. In this exam- ple, IR 0100 must be left on continuously ...

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Programming Precautions Often, complicated programs are the result of attempts to reduce the number of times a bit is used. Every instruction line must also have at least one condition determine the execution condition for the instruction ...

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Program Execution 4-10 Program Execution When program execution is started, the CPU cycles the program from top to bottom, checking all conditions and executing all instructions accordingly as it moves down the bus bar important that instructions be ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Instruction Format 5-1 Introduction The K-type PCs have large programming instruction sets that allow for easy programming of complicated control processes. This section explains each instruction individually and provides the ladder diagram symbol, data areas, and flags used with each. ...

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Data Areas, Definer Values, and Flags paired with which JUMP END instruction. Bit operands are also contained in the same word as the instruction itself, although these are not considered definers. 5-4 Data Areas, Definer Values, and Flags Each instruction ...

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Data Areas, Definer Values, and Flags The first word of any instruction defines the instruction and provides any de- finers and sometimes bit operands required by the instruction. All other oper- ands (i.e., operand words) are placed in words after ...

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Data Areas, Definer Values, and Flags Multiple Instruction Lines If a right-hand instruction requires multiple instruction lines, all of the lines for the instruction are coded before the right-hand instruction. Each of the lines for the instruction are coded starting ...

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Data Areas, Definer Values, and Flags If the condition assigned 0004 was not in the diagram, the second LD using TR 0 would not be necessary because OUT with 0102 and the AND NOT with 0005 both require the same ...

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Ladder Diagram Instructions 5-5 Ladder Diagram Instructions Ladder diagram instructions include ladder instructions and logic block in- structions. Ladder instructions correspond to the conditions on the ladder diagram. Logic block instructions are used to relate more complex parts of the ...

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Ladder Diagram Instructions Description These six basic instructions correspond to the conditions on a ladder dia- gram. As described in Section 4 Writing and Inputting the Program , the status of the bits assigned to each instruction determines the execution ...

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Bit Control Instructions 5-6 Bit Control Instructions There are five instructions that can be used generally to control individual bit status. These are OUT, OUT NOT, DIFU(13), DIFD(14), and KEEP(11). These instructions are used to turn bits ON and OFF ...

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Bit Control Instructions Limitations Any output bit can be used in only one instruction that controls its status. See 3-3 Internal Relay (IR) Area for details. Description DIFU(13) and DIFD(14) are used to turn the designated bit ON for one ...

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Bit Control Instructions 5-6-3 KEEP – KEEP(11) Description KEEP(11) is used to maintain the status of the designated bit based on two execution conditions. These execution conditions are labeled S and the set input; R, the reset ...

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INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) Precautions Never use an input bit in an normally closed condition on the reset (R) for KEEP(11) when the input device uses an AC power supply. The delay in shutting down the ...

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INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03) If the execution condition for IL(02) condition is OFF, the interlocked section between IL(02) and ILC(03) will be treated as shown in the following table: IL(02) and ILC(03) do not necessarily have ...

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JUMP and JUMP END – JMP(04) and JME(05) Example The following diagram shows IL(02) being used twice with one ILC(03). 0000 0001 0002 0003 0004 0100 0005 When the execution condition for the first IL(02) is OFF, TIM 11 will ...

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NO OPERATION – NOP(00) will not be changed. Each of these jump numbers can be used to define one jump. Because all of instructions between JMP(04) and JME(05) are skipped, jump numbers 01 through 08 can be used to reduce ...

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Timer and Counter Instructions 5-11 Timer and Counter Instructions TIM and TIMH are decrementing ON-delay timer instructions which require a TC number and a set value (SV). CNT is a decrementing counter instruction and CNTR is a reversible counter instruction. ...

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Timer and Counter Instructions 5-11-1 TIMER – TIM Limitations SV may be between 000.0 and 999.9 seconds. The decimal point not input. Each TC number can be used as the definer in only one timer or counter ...

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Timer and Counter Instructions Examples All of the following examples use OUT in diagrams that would generally be used to control output bits in the IR area. There is no reason, however, why these diagrams cannot be modified to control ...

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Timer and Counter Instructions In the following example, 0500 would be turned ON 5.0 seconds after 0000 goes ON and then turned OFF 3.0 seconds after 0000 goes OFF neces- sary to use both 0500 and 0000 to ...

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Timer and Counter Instructions Example 5: Bits can be programmed to turn ON and OFF at a regular interval while a Flicker Bits designated execution condition using TIM twice. One TIM functions to turn ON and OFF ...

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Timer and Counter Instructions Precautions Timers in interlocked program sections are reset when the execution condi- tion for IL(02) is OFF. Power interruptions also reset timers timer that is not reset under these conditions is desired, SR area ...

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Timer and Counter Instructions Timer ranges are set in the output words as shown in the following table. Example Setup This example uses an Analog Timer Unit connected to a C28K CPU. Word allocations are shown in the following table. ...

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Timer and Counter Instructions 5. First Cycle Flag 1815 Content after MOV(21 Range settings 0015 0606 0607 ...

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Timer and Counter Instructions 5-11-4 COUNTER – CNT Limitations Each TC number can be used as the definer in only one timer or counter in- struction. Description CNT is used to count down from SV when the execution condition on ...

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Timer and Counter Instructions Example 1: In the following example, the PV will be decremented whenever both 0000 Basic Application and 0001 are ON provided that 0002 is OFF and either 0000 or 0001 was OFF the last time CNT ...

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Timer and Counter Instructions Because in this example the SV for CNT 01 is 100 and the SV for CNT 02 is 200, the completion flag for CNT 02 turns ON when 100 x 200 or 20,000 OFF to ON ...

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Timer and Counter Instructions As the SV for CNT 01 is 700, the completion flag for CNT 02 turns ON when 1 second x 700 times minutes and 40 seconds have expired. This would result in 0202 being ...

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Timer and Counter Instructions CNTR(12) is reset with a reset input, R. When R goes from OFF to ON, the PV is reset to zero. The PV will not be incremented or decremented while R is ON. Counting will begin ...

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Timer and Counter Instructions In the hard reset mode, the reset signal must have an ON time of at least 250 s. Description General The high-speed counter counts the signals input from an external device con- nected to input 0000 ...

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Timer and Counter Instructions Soft Reset SR bit 1807 is the soft reset. When it is turned ON, the present value in the high-speed counter buffer is reset to “0000.” As for the hard reset, when the soft reset is ...

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Timer and Counter Instructions The values must be four-digit BCD in the range 0000 to 9999. Note that fail- ure to enter BCD values will not activate the ERR flag. Always set a lower limit which is less than the ...

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Timer and Counter Instructions Examples Extending the Counter The high-speed counter normally provides 16 output bits. If more than 16 are required, the high-speed counter may be programmed more than once. In the following program example, the high-speed counter is ...

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Timer and Counter Instructions Note that in the program just mentioned, the present value in the counter buffer is transferred to counter number 47 at points A and B. In this case, if S31 (=1,000) < S < S32 (=2,000) ...

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Timer and Counter Instructions The high-speed counter is a ring counter and thus when its present count value is incremented from 9999 to 0000, the completion flag of CNT 47 is turned ON for one cycle. By using this flag ...

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Timer and Counter Instructions The following diagram shows the packaging system and the corresponding timing chart. In this example, “x” is the number of pulses per package. To detect four pack- ages therefore, 4x must be set as the preset ...

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Timer and Counter Instructions Here is the program example for the application. 1813 (normally ON) 1815 0005 0002 HR 000 0011 HR 001 0011 0100 0005 0003 0102 0004 0102 0103 0003 1000 0005 0101 102 MOV(21) #0905 DM 32 ...

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Timer and Counter Instructions Address Instruction 0000 LD 0001 MOV(21) 0002 MOV(21) 0003 MOV(21) 0004 MOV(21) 0005 LD 0006 OR 0007 OUT 0008 LD 0009 HDM(61) 0010 LD 0011 AND NOT 0012 LD 0013 AND 5-11-7 REVERSIBLE DRUM COUNTER – ...

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Timer and Counter Instructions The transferred count value is then compared with the upper and lower limits of a set of ranges which have been preset through DM 31. If the current value is within any of ...

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Timer and Counter Instructions The values must be four-digit BCD in the range 0000 through 9999. Failure to enter BCD values will not activate the ERR flag. Always set a lower limit which is less than the corresponding upper limit. ...

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Data Shifting Timing Example The following timing example uses the results word. Present value 0000 Start input 0002 Count input (1805) Reset input (1804) UP/DOWN selection (1806) HR 000 Limits: 0001 to 0002 HR 001 Limits: 0002 ...

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Data Shifting Description SFT(10) shifts an execution condition into a shift register. SFT(10) is con- trolled by three execution conditions and R. If SFT(10) is executed and 1) execution condition and was OFF the last ...

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Data Shifting When 1280 is OFF (all times but the first cycle after 0204 has changed from OFF to ON), the jump is taken and the status of 0100 will not be changed. 0200 0201 0202 0203 0204 1280 1280 ...

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Data Shifting The program is set up so that a rotary encoder (0000) controls execution of SFT(10) through a DIFU(13), the rotary encoder is set up to turn ON and OFF each time a product passes the first sensor. Another ...

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Data Shifting Description SFTR(84) is used to create a single- or multiple-word shift register that can be shifted to either the right or the left. To create a single-word shift register, designate the same word for St and E. The ...

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Data Movement Description When the execution condition is OFF, WSFT(16) is not executed and the next instruction is moved to. When the execution condition is ON, 0000 is moved into St, the content moved ...

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DATA COMPARE – CMP(20) 5-13-2 MOVE NOT – MVN(22) Description When the execution condition is OFF, MVN(22) is not executed and the next instruction is moved to. When the execution condition is ON, MOV(21) trans- fers the inverted content of ...

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DATA COMPARE – CMP(20) Example 1: The following example shows how to save the comparison result immedi- Saving CMP(20) Results ately. If the content greater than that of 9, 0200 is turned ON; if the two ...

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DATA COMPARE – CMP(20) The branching structure of this diagram is important so that 0200, 0201, and 0202 are controlled properly as the timer counts down. Because all of the comparisons here are to the timer’s PV, the other operand ...

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Data Conversion 5-15 Data Conversion The conversion instructions convert word data that is in one format into an- other format and output the converted data to specified result word(s). Con- versions are available to convert between binary (hexadecimal) and BCD ...

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Data Conversion 5-15-3 4-TO-16 DECODER – MLPX(76) Limitations The rightmost two digits of Di must each be between D and 3. All result words must be in the same data area. Description When the execution condition is OFF, MLPX(76) is ...

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Data Conversion Some example Di values and the digit-to-word conversions that they produce are shown below. Flags ER: Example The following program converts three digits of data from bit posi- tions and turns ON the corresponding bits ...

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Data Conversion 5-15-4 16-TO-4 ENCODER – DMPX(77) Limitations The rightmost two digits of Di must each be between 0 and 3. All source words must be in the same data area. Description When the execution condition is OFF, DMPX(77) is ...

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Data Conversion Some example Di values and the word-to-digit conversions that they produce are shown below. Flags ER: Example When 0000 is ON, the following diagram encodes IR words 10 and 11 to the first two digits ...

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BCD Calculations 5-16 BCD Calculations The BCD calculation instructions perform mathematic operations on BCD data. These instructions change only the content of the words in which results are placed, i.e., the contents of source words are the same before and ...

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BCD Calculations Example If 0002 is ON, the following diagram clears CY with CLC(41), adds the con- tent constant (6103), places the result in DM 01, and then moves either all zeros or 0001 into ...

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BCD Calculations case DM 05 and DM 04 are used to represent the intermediate 4 digits and the 4 right digits respectively represents the leftmost digit, the 9th dig- it carry is generated, SR 1904 (CY) ...

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BCD Calculations not set by executing SUB(31), the result is positive, the second sub- traction is not performed and HR 300 is not turned ON. HR 300 is pro- grammed as a self-maintaining bit so that a ...

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BCD Calculations Description When the execution condition is OFF, MUL(32) is not executed and the next instruction is moved to. When the execution condition is ON, the contents of Md and Mr are multiplied and the rightmost four digits of ...

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BCD Calculations Description When the execution condition is OFF, DIV(33) is not executed and the next instruction is moved to. When the execution condition is ON, the content divided by the content of Dr and the result ...

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Subroutines 5-17 Subroutines Subroutines can be used for one of two different purposes: either to separate off sections of large control tasks so that they can be handled as smaller ones and to enable you to reuse a given set ...

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Subroutines SBS(91) may be used as many times as desired in the program (i.e., the same subroutine may be called from different places in the program). SBS(91) may also be placed into a subroutine to shift program execution from one ...

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Step Instructions 5-18 Step Instructions The step instructions STEP(08) and SNXT(09) are used in conjunction to set up breakpoints between sections in large programs so that the sections can be executed as units and reset upon completion. A step of ...

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Step Instructions Precautions Interlocks, jumps, SBN(92), and END(01) must not be used within step pro- grams. Bits used as control bits must not be used anywhere else in the program un- less they are used to control the step (see ...

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Step Instructions Examples The following three examples demonstrate the three types of execution con- trol possible with step programming. Example 1 demonstrates sequential execution; example 2, branching execution; and example 3, parallel execu- tion. Example 1: Sequential The following process ...

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Step Instructions The program for this process, shown below, utilizes the most basic type of step programming: each step is completed by a unique SNXT(09) that starts the next step. Each step starts when the switch that indicates the previous ...

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Step Instructions The following diagram demonstrates the flow of processing and the switches that are used for execution control. Here, either process A or process B is used depending on the status and SW B1. The program ...

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Step Instructions Example 3: Parallel The following process requires that two parts of a product pass simultane- Execution ously through two processes each before they are joined together in a fifth process. Various sensors are positioned to signal when processes ...

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Step Instructions Thus, process B is reset directly and process B is set indirectly before exe- cuting the step for process E. 0001 (SW1 and SW2)) Process A 0002 (SW3) Process B 1003 0004 (SW5 and SW6) Process C 0003 ...

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Special Instructions 5-19 Special Instructions The following instructions provide for special purposes: refreshing I/O bits during program execution, designating minimum cycle time, and inserting comments into a program. 5-19-1 I/O REFRESH – IORF(97) Limitations IORF can be used for refreshing ...

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Special Instructions 5-19-3 NOTATION INSERT – NETW(63) Description NETW(63) is not executed regardless of its execution condition provided so that the programmer can leave comments in the program. The operands may be any hexadecimal value from 0000 through ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Introduction 6-1 Introduction When writing and debugging a program, the timing of various operations must be considered. Not only is the time required to execute the program and perform other CPU operations important, but also the timing of each sig- ...

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Cycle Time 6-2 Cycle Time To aid in PC operation, the average cycle time can be displayed on the Pro- gramming Console or any other Programming Device. Understanding the operations that occur during the cycle and the elements that affect ...

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Cycle Time The first three operations immediately after power application are performed once each time the PC is turned on. The then on the operations shown above are performed in cyclic fashion, with each cycle forming one cycle. The cycle ...

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Calculating Cycle Time 6-3 Calculating Cycle Time The PC configuration, the program, and program execution conditions must be taken into consideration when calculating the cycle time. This means tak- ing into account such things as the number of I/O points, ...

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... The overseeing time is fixed at 1.6 ms. The input/output refresh time would be as follows: 0. (0. the C40K is provided with only one input and one output word and the C40P Expansion unit contains input and output words the value of the con- stant (i.e – and so the time required is 0. (0. ...

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Instruction Execution Times The cycle time is the total of all these calculations 34. 36. peripheral device had been present it would have been: 1 0.75 ms ...

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Instruction Execution Times Function Instruction code 09 SNXT 100 10 SFT 102 248 90 to 254 11 KEEP CNTR 95 190.5 13 DIFU 60.5 56.5 14 DIFD 59 62.5 15 TIMH 94 187.5 16 WSFT ...

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I/O Response Time Function Instruction code 84 SFTR 136 to 668 SBS 75 92 SBN 26 93 RET 49 97 IORF 108 6-5 I/O Response Time The I/O response time is the time it takes for the ...

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I/O Response Time Maximum I/O Response The PC takes longest to respond when it receives the input signal just after Time the input refresh phase of the cycle. In this case the CPU does not recognize the input signal until ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Debugging 7-1 Introduction This section provides the procedures for inputting and debugging a program and monitoring and controlling the PC through a Programming Console. The Programming Console is the most commonly used Programming Device for the K-type PCs ...

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Monitoring Operation and Modifying Data Example The following displays show some of the messages that may appear. Refer to Section 8 Troubleshooting for an inclusive list of error messages, mean- ings, and appropriate responses. Note Cycle time is displayed as ...

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Monitoring Operation and Modifying Data 7-3-1 Bit/Digit Monitor The status of any bit or word in any data area can be monitored using the following operation. Although the operation is possible in any mode, ON/OFF status displays will be provided ...

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Monitoring Operation and Modifying Data Key Sequence Examples The following examples show various applications of this monitor operation. Program Read then Monitor Section 7-3 Indicates Completion flag is ON Monitor operation is cancelled 151 ...

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Monitoring Operation and Modifying Data Bit Monitor Word Monitor 152 Section 7-3 ...

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Monitoring Operation and Modifying Data Multiple Address Monitoring 7-3-2 Force Set/Reset When the Bit/Digit Monitor operation is being performed and a bit, timer, or counter address is leftmost on the display, PLAY/SET can be pressed to turn ON the bit, ...

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Monitoring Operation and Modifying Data Key Sequence Example The following example shows how either bits or timers can be controlled with the Force Set/Reset operation. The displays shown below are for the follow- ing program section. 154 0002 0003 TIM ...

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Monitoring Operation and Modifying Data The following displays show what happens when TIM 00 is set with 0100 OFF (i.e., 0500 is turned ON) and what happens when TIM 00 is reset with 0100 ON (i.e., timer starts operation, turning ...

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Monitoring Operation and Modifying Data To change contents of the leftmost word address, press CHG, input the de- sired value, and press WRITE. Key Sequence Example The following example shows the effects of changing the timer. 7-3-4 ...

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Program Backup and Restore Operations Key Sequence Example The following example shows inputting a new constant and changing from a constant to a word designation. Inputting New SV 7-4 Program Backup and Restore Operations Program Memory (UM) can be backed-up ...

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Program Backup and Restore Operations The PC must be in PROGRAM mode for all cassette tape operations. While the operation is in progress, the cursor will blink and the block count will be incremented on the display. Cassette tape operations ...

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Program Backup and Restore Operations Example 7-4-2 Restoring or Comparing Program Memory Data This operation is used to restore Program Memory data from a cassette tape or to compare Program Memory data with the contents on a cassette tape. The ...

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Program Backup and Restore Operations Key Sequence Example Restoring in progress END reached Restored up to END Stop restoring using CLR 160 Section 7-4 Comparison in progress END reached Stop comparison using CLR Compared up to end of tape ...

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Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Error Messages 8-1 Introduction The K-type PCs provide self-diagnostic functions to identify many types of abnormal system conditions. These functions minimize downtime and enable quick, smooth error correction. This section provides information on hardware and software errors that occur during ...

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Error Messages Non-fatal Operating Errors The following error messages appear for errors that occur after program exe- cution has been started. PC operation and program execution will continue after one or more of these error have occurred. The POWER, RUN, ...

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Error Flags 8-4 Error Flags The following table lists the flags and other information provided in the SR area that can be used in troubleshooting. Details are provided in 3-4 Special Relay (SR) Area . SR Area Other Error Messages ...

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... Analog Timer, Analog I/O Unit, or I/O Link Unit. CPUs C20K-C - C20P To order cable sepa- rately, specify C28K-C - C4K-CN502 C28P One included with each Ex- C40K-C - pansion I/O Unit. C40P C60K-C - C60P Appendix A Standard Models Expansion I/O Units C4K-I /O C4K-CN502 (included with Unit) C16P ...

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... Triac Relay w/socket Transistor Appendix A Model number Standards 8 pts C20K-CDR C20K-CDT1 C20K-CDS1 C20K-CAR C20K-CAS1 C20K-CDR C20K-CDT1 pts C28K-CDR C28K-CDT1 C28K-CDS1 C28K-CAR C28K-CAS1 C40K-CDR C28K-CDT1 pts C40K-CDR C40K-CDT1 C40K-CDS1 C40K-CAR C40K-CAS1 C40K-CDR C40K-CDT1 pts C60K-CDR C60K-CDT1 C60K-CDS1 C60K-CAR C60K-CAS1 C60K-CDR C60K-CDT1-D --- ...

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Standard Models I/O Units Name Power Supply C4K I/O Unit --- 24 VDC, 4 pts 100 to 120 VAC, 4 pts --- C16P I/O Unit 100 to 240 VAC 24 VDC, 16 pts --- --- 24 VDC, 16 pts 100 ...

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... U: UL, C: CSA, N: NK, L: LLOYD See Omron sales representatives concerning operating conditions under which UL, CSA, and NK standards were met (Aug. 1991). 168 Specifications C20/C20K/C28K/C40K/C60K Cable length Cable length Appendix A Model number Standards C4K-TM ...

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Standard Models Mounting Rail and Accessories Name DIN Track Length Length End Plate --- Spacer --- Factory Intelligent Terminal (FIT) Name FIT 1. FIT Computer 2. SYSMATE Ladder Pack (2 system disks, 1 data disk) 3. ...

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... Memory Rack K-type PCs w/comment printing function K-type PCs Printer Connecting Cable 2 m (also used for X-Y plotter) Floppy Disk Interface C20K/C28K/C40K/C60K. GPC required; with comment Unit file; able to connect to NEC floppy disk controller Peripheral Interface Unit To connect GPC or FIT to K-type PCs ...

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Programming Instructions and Execution Times Function code - LOAD - LOAD NOT - AND - AND NOT - NOT - AND LOAD - OR LOAD - OUTPUT - OUTPUT NOT - TIMER - COUNTER 00 NO OPERATION ...

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Programming Instructions and Execution Times Function code 61 HIGH-SPEED DRUM COUNTER 62 END WAIT 63 NOTATION INSERT 76 4-TO-16 DECODER 77 16-TO-4 ENCODER 84 REVERSIBLE SHIFT REGISTER 91 SUBROUTINE ENTER 92 SUBROUTINE DEFINE 93 RETURN 97 I/O REFRESH Instruction Execution ...

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Programming Instructions and Execution Times Function Instruction Execution code time( s) --- TIM 95 95.5 to 186.5 CNT 80.5 91.5 TO 184 00 NOP 2 01 END — 2.5 03 ILC 3 04 JMP 94 05 JME 38 ...

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Programming Instructions and Execution Times Function Instruction Execution code time DIV 572 40 STC 16 41 CLC 16 60 RDM 695 61 HDM 734 62 ENDW 197 63 NETW 58 76 MLPX 212.5 288 355 431 77 DMPX ...

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Programming Instructions and Execution Times Ladder Diagram Instructions Name Symbol Mnemonic LOAD LD LD LOAD NOT LD NOT LD NOT AND AND AND AND NOT AND NOT AND NOT NOT OR NOT OR NOT AND LOAD ...

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Programming Instructions and Execution Times Name Symbol Mnemonic OUTPUT OUT B OUT OUTPUT NOT OUT NOT B OUT NOT TIMER TIM N TIM TIM N COUNTER CNT CNT N SV CNT N Refer to table at beginning of Appendix B ...

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Programming Instructions and Execution Times Special Instructions Name Symbol Mnemonic NO OPERATION None NOP (00) END END(01) END(01) INTERLOCK IL(02) IL(02) INTERLOCK CLEAR ILC(03) ILC(03) JUMP JMP(04) JMP(04) JUMP END JME(05) JME(05) STEP DEFINE STEP(08) STEP(08) N STEP(08) STEP START ...

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Programming Instructions and Execution Times Name Symbol Mnemonic DIFFERENTIATE UP DIFU(13) DIFU(13) DIFFERENTIATE DOWN DIFD(14) DIFD(14) HIGH-SPEED TIMER TIMH(15) TIMH(15) N WORD SHIFT WSFT(16) WSFT(16) COMPARE CMP(20) CMP(20) Cp1 Cp2 MOVE MOV(21) MOV(21) MOVE NOT MVN(22) MVN(22 BCD-TO-BINARY ...

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Programming Instructions and Execution Times Name Symbol Mnemonic BINARY-TO-BCD BCD(24) BCD(24 BCD ADD ADD(30) ADD(30 BCD SUBTRACT SUB(31) SUB(31 BCD MULTIPLY MUL(32) MUL(32 BCD DIVIDE DIV(33) DIV(33 ...

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Programming Instructions and Execution Times Name Symbol Mnemonic END WAIT ENDW(62) ENDW(62) N NOTATION NETW(63) INSERT C1 NETW(63) C2 4-TO-16 DECODER MLPX(76) MLPX(76) 16-TO-4 ENCODER DMPX(77) DMPX(77) REVERSIBLE SFTR(84) SHIFT REGISTER SFT(84) SUBROUTINE ENTER SBS(91) N SBS(91) SUBROUTINE DEFINE SBN(92) ...

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Programming Instructions and Execution Times Name Symbol Mnemonic RETURN RET(93) RET(93) I/O REFRESH IORF(97) IORF(97) Refer to table at beginning of Appendix B for page references. Function Indicates the end of a subroutine defi- nition. Refreshes I/O words between a ...

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Programming Console Operations Name Data Clear Used to erase data, either selectively or totally, from the Program Memory and the IR, AR, HR, DM, and TC areas. Address Designation Displays the specified address. Program Search Searches a program for the ...

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Programming Console Operations Programming Operations Operation/Description Modes* Address Designation Displays the specified address. Can be used to start programming from a non-zero address or to access an address for editing. Leading zeros need not be entered. The ...

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Programming Console Operations Monitoring and Data Changing Operations Operation/Description Modes* Bit/Word Monitor six memory addresses, containing either words or bits combination of the two, can be monitored at once. Only three can be ...

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Programming Console Operations Operation/Description Modes* SV Change Reset M There are three ways of modifying the SVs for timers and counters. One method is to enter a new value. The second is to increment or decrement the ...

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Programming Console Operations Cassette Tape Operations Operation/Description Modes* Program Memory Save P Copies data from the Program Memory to tape. The file no. specified in the instructions provides an identifying address for the information within the tape. Each file number ...

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Error and Arithmetic Flag Operation The following table shows which instructions affect the ER, CY, GT, LT and EQ flags. In general, ER indicates that operand data is not within requirements. CY indicates arithmetic or data shift results. GT indicates ...

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Appendix E Binary–Hexadecimal–Decimal Table Decimal BCD 00 00000000 01 00000001 02 00000010 03 00000011 04 00000100 05 00000101 06 00000110 07 00000111 08 00001000 09 00001001 10 00010000 11 00010001 12 00010010 13 00010011 14 00010100 15 00010101 16 00010110 ...

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Word Assignment Recording Sheets This appendix contains sheets that can be copied by the programmer to record I/O bit allocations and terminal assignments on the Racks, as well as details of work bits, data storage areas, timers, and counters. Appendix ...

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