C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 188

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C40K-CDR-A

Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C40K-CDR-A

Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Programming Instructions and Execution Times
Special Instructions
NO OPERATION
NOP (00)
END
END(01)
INTERLOCK
IL(02)
INTERLOCK
CLEAR
ILC(03)
JUMP
JMP(04)
JUMP END
JME(05)
STEP DEFINE
STEP(08)
STEP START
SNXT(09)
SHIFT REGISTER
SFT(10)
KEEP
KEEP(11)
REVERSIBLE
COUNTER
CNTR (12)
Refer to table at beginning of Appendix B for page references.
Mnemonic
Name
I
P
R
II
DI
R
STEP(08) N
STEP(08)
SNXT(09) N
Symbol
JMP(04)
END(01)
JME(05)
S
R
None
ILC(03)
IL(02)
KEEP(11)
SFT(10)
CNTR
SV
N
St
E
B
Nothing is executed and next instruc-
tion is moved to.
Required at the end of the program.
If interlock condition is OFF, all outputs
are turned OFF and all timer PVs reset
between this IL(02) and the next
ILC(03). Other instructions are treated
as NOP; counter PV are maintained.
Cause all instructions between
JMP(04) and the corresponding
JME(05) to be ignored. Corresponding
JME is next one in program; only 8
JMP-JME pairs allowed per program.
Is used in the definition of program
sections. STEP N marks the beginning
of the section identified by N. STEP
without an operand indicates the end
of a series of program sections.
SNXT resets the timers and clears the
data areas used in the previous pro-
gram section. SNTX must also be
present at the end of a series of pro-
gram sections.
Creates a bit shift register from the
starting word (St) through the ending
word (E). I: input bit; P: shift pulse; R:
reset input. St must be less than or
equal to E and Bg and E must be in the
same data area.
Defines a bit (B) as a latch controlled
by set (S) and reset (R) inputs.
Increases or decreases PV by one
whenever the increment input (II) or
decrement input (DI) signal goes from
OFF to ON. SV: 0 to 9999; R: reset in-
put. Must not access the same TC bit
as another timer/counter. The TC bit is
input as a constant.
15
E
00
Function
15
St
00
IN
None
None
None
None
N:
HR
N:
HR
St/E:
IR
HR
B:
IR
HR
N:
TC
Appendix B
SV:
IR
HR
#
Operands
177

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