C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 88

• Manufacturer Part Number: C40K-CDR-A
• Description: PROGRAMMABLE CONTROLLER CPU
• Manufacturer: Omron

Specifications of C40K-CDR-A

• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Bit Control Instructions
5-6-3
Description
Flags
0002
0500
0002
0003
0003
KEEP – KEEP(11)
KEEP(11) is used to maintain the status of the designated bit based on two
execution conditions. These execution conditions are labeled S and R. S is
the set input; R, the reset input. KEEP(11) operates like a latching relay that
is set by S and reset by R.
When S turns ON, the designated bit will go ON and stay ON until reset, re-
gardless of whether S stays ON or goes OFF. When R turns ON, the desig-
nated bit will go OFF and stay OFF until reset, regardless of whether R stays
ON or goes OFF. The relationship between execution conditions and
KEEP(11) bit status is shown below.
Notice that KEEP(11) operates like a self-maintaining bit. The following two
diagrams would function identically, though the one using KEEP(11) requires
one less instruction to program and would maintain status even in an inter-
locked program section.
There are no flags affected by this instruction.
S execution condition
R execution condition
Status of B
Ladder Symbol
S
R
KEEP(11)
S
R
KEEP(11)
0500
B
0500
Address Instruction
Address Instruction
0000
0001
0002
0003
0000
0001
0002
Operand Data Areas
LD
OR
AND NOT
OUT
LD
LD
KEEP(11)
IR, HR
B: Bit
Section 5-6
Operands
Operands
0002
0500
0003
0500
0002
0003
0500
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