ADNS-9500 Avago Technologies US Inc., ADNS-9500 Datasheet - Page 34

• Manufacturer Part Number: ADNS-9500
• Description: Ultimate Gaming Laser Sensor
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-9500

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Frame_Period_Max_Bound_Lower
Access: R/W
Frame_Period_Max_Bound_Upper
Access: R/W
Data Type: 16-bit unsigned integer.
USAGE: This value sets the maximum frame period (the MINIMUM frame rate) which may be selected by the automatic
34
Bit
Field
Bit
Field
frame rate control, or sets the actual frame period when operating in manual mode. To read from the registers,
read Upper first followed by Lower. To write to the registers, write Lower first, followed by Upper. Units are clock
cycles of the internal oscillator (nominally 47MHz). The formula is:
Frame Rate (Frames/second, fps) = Clock Frequency / Register Value
To set the frame rate manually, disable automatic frame rate mode via the Configuration_II register and write
the desired count value to these registers. Writing to the Frame_Period_Max_Bound_Upper and Lower registers
also activates any new values in the following registers:
x Frame_Period_Max_Bound_Upper and Lower
x Frame_Period_Min_Bound_Upper and Lower
x Shutter_Max_Bound_Upper and Lower
Any data written to these registers will be saved but will not take effect until the write to the Frame_Period_
Max_Bound_Upper and Lower is complete. After writing to this register, two complete frame times are required
to implement the new settings. Writing to any of the above registers before the implementation is complete
may put the chip into an undefined state requiring a reset.
The three bound registers must also follow this rule when set to non-default values. There is no protection
against illegal register settings, which can impact the navigation.
Frame_Period_Max_Bound ≥ Frame_Period_Min_Bound + Shutter_Max_Bound.
The following table lists some Frame Period example values with a 47MHz clock.
Frame Rate
1,880
1,958
7,200
11,750
7
FBM
7
FBM
7
15
Frame Period
Decimal
25,000
24,000
6,528
4,000
6
FBM
6
FBM
6
14
Address: 0x1A
Reset Value: 0xc0
Address: 0x1B
Reset Value: 0x5d
5
FBM
5
FBM
Hex
61a8
5dc0
1980
0fa0
5
13
4
FBM
4
FBM
4
12
Frame_Period Register Value
Upper
61
5d
19
0f
3
FBM
3
FBM
3
11
Lower
a8
c0
80
a0
2
FBM
2
FBM
2
10
1
FBM
1
FBM
1
9
0
FBM
0
FBM
0
8