IPTR-C2H-NIOS Altera, IPTR-C2H-NIOS Datasheet - Page 70
IPTR-C2H-NIOS
Manufacturer Part Number
IPTR-C2H-NIOS
Description
IP CORE Renewal Of IPT-C2H-NIOS
Manufacturer
Altera
Datasheet
1.IPT-C2H-NIOS.pdf
(138 pages)
Specifications of IPTR-C2H-NIOS
Software Application
IP CORE, NIOS Processor And Functions
Core Architecture
Nios II
Features
ANSI C Compliance, Straightforward C-to-Hardware Mapping, Reporting Of Generated Results
Core Sub-architecture
Cyclone
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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Scheduling
Example 3–25. Structure Pointer Declaration
struct s_ptr
{
} * my_struct;
Scheduling
3–30
Nios II C2H Compiler User Guide
int element_a;
int element_b;
int element_c;
Consider the simple struct declaration shown in
In this example, the expression (my_struct->element_c) translates
to the following:
This section describes how the C2H Compiler schedules operations. The
C2H Compiler is similar to a traditional C compiler in many respects: It
parses code, creates a graph of the dependencies, performs some
optimizations, schedules the sequence to execute each operation, and
outputs an object file in the form of a hardware accelerator. However,
fundamental differences exist between scheduling for a microprocessor
and scheduling for a hardware accelerator.
Scheduling Concepts for Hardware Accelerators
A microprocessor has limited computational resources, defined by its
arithmetic logic unit (ALU), and limited I/O resources, defined by its
data bus architecture. In contrast, a hardware accelerator can have
arbitrary computational and I/O resources, limited only by the practical
bounds of resource utilization and the ability to achieve frequency
performance. These resources can operate in parallel, stalling only to wait
for data dependencies to resolve.
The C2H Compiler uses the following fundamental rule for scheduling:
Perform computation operations and I/O operations as soon as data
dependencies are resolved.
State Machines
Sections
Declarations” on page
described how the C2H Compiler translates individual operations,
assignments, and memory accesses to atomic functional units in
*((int *)((void *)mystruct + 2*sizeof(int)))
“One-to-One C-to-Hardware Mapping” on page
9.1
3–13, and
“Memory Accesses” on page 3–15
Example
Altera Corporation
November 2009
3–1,
3–25.
“Variable
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