SM1211E915 Semtech, SM1211E915 Datasheet - Page 61

Dev Kit Accessory

SM1211E915

Manufacturer Part Number
SM1211E915
Description
Dev Kit Accessory
Manufacturer
Semtech
Datasheets

Specifications of SM1211E915

Modulation Type
FSK, OOK
Data Rate Max
200Kbps
Frequency Range
902MHz To 928MHz
Supply Voltage Range
2.1V To 3.6V
Module Interface
SPI
Supply Current
25mA
Accessory Type
RF Module
Sensitivity
-105dBm
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFN EP
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Sensitivity (dbm)
-105dBm
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Rev 7 – Sept 2
ADVANCED COMMUNICATIONS & SENSING
Fifo_fill
Tx_done
Tx_start_irq_0
Res
RSSI_irq
PLL_locked
PLL_lock_en
RSSI_irq_thresh
nd
, 2008
6
5
4
3
2
1
0
7-0
14
14
14
14
14
14
14
15
r/w/
c
r
r/w
r/w
r/w/
c
r/w/
c
r/w
0
1
FIFO filling status/control (Buffered mode only):
Goes high when FIFO is being filled (sync word has been detected)
Writing ‘1’ clears the bit and waits for a new sync word (if Fifo_overrun_clr=0)
0
1
Tx_done IRQ source
Goes high when the last bit has left the shift register.
Tx start condition and IRQ_0 source:
0
1
0
equal to the threshold set by MCParam_Fifo_thresh parameter (Cf section
5.2.2.3), IRQ_0 mapped to Fifo_threshold (d)
1
(d): “0”, should be set to “1”.
Note: “0” disables the RSSI IRQ source. It can be left enabled at any time, and
the user can choose to map this interrupt to IRQ0/IRQ1 or not.
RSSI IRQ source:
Goes high when a signal above RSSI_irq_thresh is detected
Writing ‘1’ clears the bit
PLL status:
0
1
Writing a ‘1’ clears the bit
PLL_lock detect flag mapped to pin 23:
0
1
RSSI threshold for interrupt (coded as RSSI)
(d): “00000000”
If Fifo_fill_method = ‘0’: (d)
If Fifo_fill_method = ‘1’:
If Data_mode(1:0) = 01 (Buffered mode):
If Data_mode(1:0) = 1x (Packet mode):
Automatically starts when a sync word is detected (d)
Manually controlled by Fifo_fill
Stop filling the FIFO
Start filling the FIFO
Tx starts if FIFO is full, IRQ_0 mapped to /Fifoempty (d)
Tx starts if FIFO is not empty, IRQ_0 mapped to /Fifoempty
Tx starts if FIFO is not empty, IRQ_0 mapped to /Fifoempty
not locked
locked
Lock detect disabled, pin 23 is High-Z
Lock detect enabled(d)
Start transmission when the number of bytes in FIFO is greater than or
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