AD8367ARU-REEL7 Analog Devices Inc, AD8367ARU-REEL7 Datasheet - Page 16

• Manufacturer Part Number: AD8367ARU-REEL7
• Description: IC,Voltage Controlled Gain Amplifier,SINGLE,TSSOP,14PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: X-AMP®r

Specifications of AD8367ARU-REEL7

• Rohs Status: RoHS non-compliant
• Amplifier Type: Variable Gain
• Number Of Circuits: 1
• -3db Bandwidth: 500MHz
• Current - Input Bias: 27µA
• Current - Supply: 26mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Output Type: -
• Current - Output / Channel: -
• Slew Rate: -
• Gain Bandwidth Product: -
• Voltage - Input Offset: -

AD8367
held to within 0.1 dB of the setpoint for >35 dB range of
input levels.
The dynamics of this loop are controlled by C
conjunction with an on-chip equivalent resistance, R
10 kΩ which form an effective time-constant T
The loop thus operates as a single-pole system with a loop
bandwidth of 1/(2π T
linear in decibels, this bandwidth is independent of the absolute
signal level. Figure 36 illustrates the loop dynamics for a 30 dB
change in input signal level with C
It is important to understand that R
shunt with C
true integrator, to guarantee an output that is exactly equal in
rms amplitude to the specified setpoint. For large changes in
input level, the integrating action of this loop is most apparent.
The slew rate of V
from the detector and the capacitor. Thus, for a representative
value of C
while the small-signal bandwidth is 1 kHz.
Figure 36. AGC Response to a 32 dB Step in Input Level (f = 50 MHz)
–1.2
–1.3
–1.4
–1.5
–1.6
–1.7
–1.8
–1.9
–2.0
–2.1
–2.2
–0.2
–0.4
–0.6
1.0
0.8
0.6
0.4
0.2
–50
0
AGC
0
Figure 35. Leveling Accuracy of the AGC Function
AGC
= 3 nF, this rate is about 20 V rms or 10 dB/μs,
. Rather, the error-correction process is that of a
5
–40
AGC
AGC
10
is determined by the peak output current
). Because the gain control function is
–30
PIN (dBm re 200Ω)
15
V
OUT
TIME (μs)
–20
20
AGC
V
AGC
AGC
= 100 pF.
does not act as if in
25
–10
30
AGC
AGC
acting in
0
= R
35
AGC
AGC
, of
10
40
C
AGC
Rev. A | Page 16 of 24
.
Most AGC loops incorporating a true error-integrating
technique have a common weakness. When driven from an
increasingly larger signal, the AGC bias increases to reduce the
gain. However, eventually the gain falls to its minimum value,
for which further increase in this bias has no effect on the gain.
That is, the voltage on the loop capacitor is forced progressively
higher because the detector output is a current, and the AGC
bias is its integral. Consequently, there is always a precipitous
increase in this bias voltage when the input to the AD8367
exceeds that value that overdrives the detector, and because the
minimum gain is −2.5 dB, that happens for all inputs 2.5 dB
greater than the setpoint of ~350 mV rms. If possible, the user
should ensure that this limitation is preserved, preferably with a
guard-band of 5 dB to 10 dB below overload
In some cases, if driven into AGC overload, the AD8367
requires unusually long times to recover; that is, the voltage
at DETO remains at an abnormally high value and the gain is at
its lowest value. To avoid this situation, it is recommended that
a clamp be placed on the DETO pin, as shown in Figure 37.
MODIFYING THE AGC SETPOINT
If an AGC setpoint other than the internal one is desired, an
external detector must be used. Figure 38 shows a method
that uses an external true-rms detector and error integrator to
operate the AD8367 as a closed-loop AGC system with a user-
settable operating level.
The AD8361 (U2) produces a dc output level that is
proportional to the rms value of its input, taken as a sample
of the AD8367 (U1) output. This dc voltage is compared to
an externally-supplied setpoint voltage, and the difference is
integrated by the AD820 (U3) to form the gain control voltage
that is applied to the GAIN input of the AD8367 through the
divider composed of R4 and R5. This divider is included in
order to minimize overload recovery time of the loop by having
the integrator saturate at a point that only slightly overdrives the
gain control input of the AD8367. The scale factor at V
influenced by the values of R4 and R5; for the values shown, the
factor is 86 mV/dB.
The resistive divider network, RA and RB, should be designed
0.5V
RB
RA
+V
Figure 37. External Clamp to Prevent AGC Overload.
S
such that the base of Q1 is driven to 0.5 V.
Q1
2N2907
C
0.1μF
AGC
V
AGC
1
2
3
4
5
6
7
MODE
GAIN
DETO
ICOM
AD8367
14
13
12
11
10
9
8
AGC
is