AD9773BSVRL Analog Devices Inc, AD9773BSVRL Datasheet - Page 50

IC,D/A CONVERTER,DUAL,12-BIT,CMOS,TQFP,80PIN

AD9773BSVRL

Manufacturer Part Number

AD9773BSVRL

Description

IC,D/A CONVERTER,DUAL,12-BIT,CMOS,TQFP,80PIN

Manufacturer

Analog Devices Inc

Series

TxDAC®r

Datasheet

1.AD9773BSVZRL.pdf (60 pages)

Specifications of AD9773BSVRL

Rohs Status

RoHS non-compliant

Settling Time

11ns

Number Of Bits

Data Interface

Serial, SPI™

Number Of Converters

Voltage Supply Source

Analog and Digital

Power Dissipation (max)

410mW

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

80-TQFP Exposed Pad, 80-eTQFP, 80-HTQFP, 80-VQFP

For Use With

AD9773-EBZ - BOARD EVALUATION AD9773

Lead Free Status / RoHS Status

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AD9773

Figure 103. Test Configuration for AD9773 in Two-Port Mode with PLL Disabled, DAC Output Data Rate = Signal Generator Frequency,

Figure 104. Test Configuration for AD9773 in One-Port Mode with PLL Disabled, DAC Output Data Rate = Signal Generator Frequency,

ONEPORTCLK = Interleaved Input Data Rate = 2x Signal Generator Frequency/Interpolation Rate

NOTES

1. TO USE PECL DRIVER (U8), SOLDER JP41 AND JP42 AND REMOVE TRANSFORMER T1.

2. IN TWO-PORT MODE, IF DATACLK/PLL_LOCK IS PROGRAMMED TO OUTPUT PIN 8, JP25

NOTES

1. TO USE PECL DRIVER (U8), SOLDER JP41 AND JP42 AND REMOVE TRANSFORMER T1.

AND JP39 SHOULD BE SOLDERED. IF DATACLK/PLL_LOCK IS PROGRAMMED TO OUTPUT

PIN 53, JP46 AND JP47 SHOULD BE SOLDERED. FOR MORE INFORMATION, SEE THE

TWO-PORT DATA INPUT MODE SECTION.

INPUT CLOCK

JUMPER CONFIGURATION FOR TWO-PORT MODE, PLL OFF

JUMPER CONFIGURATION FOR ONE-PORT MODE, PLL OFF

JP12 –

JP24 –

JP25 –

JP26 –

JP27 –

JP31 –

JP32 –

JP33 –

JP12 –

JP24 –

JP25 –

JP26 –

JP27 –

JP31 –

JP32 –

JP33 –

AWG2021

JP1 –

JP2 –

JP3 –

JP5 –

JP6 –

JP1 –

JP2 –

JP3 –

JP5 –

JP6 –

DG2020

DATACLK = Signal Generator Frequency/Interpolation Rate

SOLDERED/IN

LECROY

PULSE

GENERATOR

LECROY

PULSE

GENERATOR

40-PIN RIBBON CABLE

UNSOLDERED/OUT

Rev. D | Page 50 of 60

TRIG

INP

DATACLK

ONEPORTCLK

DAC1, DB11–DB0

DAC2, DB11–DB0

DAC1, DB11–DB0

DAC2, DB11–DB0

SIGNAL GENERATOR

CLK+/CLK–

AD9773

AD9773BSVRL Analog Devices Inc, AD9773BSVRL Datasheet - Page 50

AD9773BSVRL

Specifications of AD9773BSVRL

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