ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 120

• Manufacturer Part Number: ADE7518ASTZF16-RL
• Description: 1-Phase Energy Meter IC
• Manufacturer: Analog Devices Inc

Specifications of ADE7518ASTZF16-RL

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE75xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7518
I
The I
FIFO. The buffers reduce the overhead associated with using
the I
receive and transmit FIFOs.
The Tx FIFO can be loaded with four bytes to be transmitted to
the slave at the beginning of a write operation. When the
transmit FIFO is empty, the I
and the PC vectors to the I
enabled. If a new byte is not loaded into the Tx FIFO before it is
needed in the transmit shift register, the communication stops.
An error, such as not receiving an acknowledge, also causes the
communication to terminate. In case of an error during a write
operation, the Tx FIFO is flushed.
The Rx FIFO allows four bytes to be read in from the slave
before the MCU has to read the data. A receive interrupt can
2
C RECEIVE AND TRANSMIT FIFOS
2
2
C peripheral. Figure 100 shows the operation of the I
C peripheral has a 4-byte receive FIFO and a 4-byte transmit
2
C interrupt vector if this interrupt is
2
C transmit interrupt flag is set,
2
C
Rev. 0 | Page 120 of 128
be generated after each byte is received or when the Rx FIFO
is full. If the peripheral is reading from a slave address, the
communication stops once the number of received bytes equals
the number set in I2CRCT, Bits [4:0]. An error, such as not
receiving an acknowledge, also causes the communication to
terminate.
4-BYTE FIFO
CODE TO FILL Tx FIFO:
MOV I
MOV I
MOV I
MOV I
TRANSMIT SHIFT REGISTER
2
2
2
2
CTx, TxDATA1
CTx, TxDATA2
CTx, TxDATA3
CTx, TxDATA4
TxDATA4
TxDATA3
TxDATA2
TxDATA1
I
2
CTx
Figure 100. I
4-BYTE FIFO
2
C FIFO Operation
CODE TO READ Rx FIFO:
MOV A, I
MOV A, I
MOV A, I
MOV A, I
RECEIVE SHIFT REGISTER
2
2
2
2
CRx; RESULT: A = RxDATA1
CRx; RESULT: A = RxDATA2
CRx; RESULT: A = RxDATA3
CRx; RESULT: A = RxDATA4
RxDATA1
RxDATA2
RxDATA3
RxDATA4
I
2
CRx