ADN4604ASVZ-RL Analog Devices Inc, ADN4604ASVZ-RL Datasheet - Page 34

• Manufacturer Part Number: ADN4604ASVZ-RL
• Description: 4.25Gbps 16x16 Crossbar Switch
• Manufacturer: Analog Devices Inc
• Series: XStream™r

Specifications of ADN4604ASVZ-RL

• Function: Crosspoint Switch
• Circuit: 1 x 16:16
• On-state Resistance: 56 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 2.7 V ~ 3.6 V
• Current - Supply: 95mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADN4604
SUPPLY SEQUENCING
Ideally, all power supplies should be brought up to the appropri-
ate levels simultaneously (power supply requirements are set by
the supply limits in Table 1 and the absolute maximum ratings
listed in Table 4). If the power supplies to the ADN4604 are
brought up separately, the supply power-up sequence is as follows:
DV
supplies (V
sequence is reversed with termination supplies being powered
off first. The termination supplies contain ESD protection
diodes to the V
current condition in these devices (I
V
should be powered off before V
If the system power supplies have a high impedance in the
powered off state, then supply sequencing is not required
provided the following limits are observed:
•
•
POWER DISSIPATION
The power dissipation of the ADN4604 depends on the supply
voltages, I/O coupling type, and device configuration. The
input termination resistors dissipate power depending on the
differential input swing and common-mode voltage. When ac-
coupled, the common-mode voltage is equal to the termination
supply voltage (V
the input termination supply is effectively zero, there is still
power and heat dissipated in the termination resistors as a result
of the differential signal swing. The core supply current and
output termination current are strongly dependent on device
configuration, such as the number of channels enabled, output
level setting, and output preemphasis setting.
In high ambient temperature operating conditions, it is impor-
tant to avoid exceeding the maximum junction temperature of
the device. Limiting the total power dissipation can be achieved
by the following:
•
TTI
CC
and V
Peak current from V
Sustained current from V
Reducing the output swing
powered first, followed by V
TTO
TTIE
supplies should be powered on after V
, V
CC
TTIW
TTIE
power domain. To avoid a sustained high
, V
or V
TTON
TTIx
TTIW
, and V
or V
3.3V
). While the current drawn from
CML
TTIx
CC
.
TTOx
or V
CC
TTOS
, and, last the termination
SUSTAINED
to V
TTOx
). The power-down
Z
Z
0
0
CC
to V
< 100 mA), the
< 200 mA
Figure 54. DC-Coupled Level Translator Application Circuit
CC
< 100 mA
3.3V
CC
V
TTIx
and
3.3V
CML
Rev. 0 | Page 34 of 40
V
V
CC
EE
ADN4604
1.8V
V
TTOx
•
•
•
Alternatively, the thermal resistance can be reduced by
•
•
Refer to the Printed Circuit Board (PCB) Layout Guidelines
section for recommendations for proper thermal stencil layout
and fabrication.
OUTPUT COMPLIANCE
In low voltage applications, users must pay careful attention
to both the differential and common-mode signal level. The
choice of output voltage swing, preemphasis setting, supply
voltages (V
peak and settled single-ended voltage swings and the common-
mode shift measured across the output termination resistors.
These choices also affect output current and, consequently,
power consumption. Table 19 shows the change in output
common mode (ΔV
preemphasis setting. Single-ended output levels are calculated
for V
challenges of reducing the supply voltage. The minimum V
V
Table 1. The combinations of output level, preemphasis, supply
voltage, and output coupling for which the minimum V
specification is violated are listed as N/A in Table 1.
Since the absolute minimum output voltage specified in Table 1
is relative to V
output levels within the specified limits when lower output
termination voltages are required. V
are allowable for output swings less than or equal to 400 mV
(single-ended). Figure 54 illustrates an application where the
ADN4604 is used as a dc-coupled level translator to interface a
3.3 V CML driver to an ASIC with 1.8 V I/Os. The diode in
series with V
compliance.
L
) cannot be below the absolute minimum level specified in
Reducing the preemphasis level
Decreasing the supply voltages within the allowable ranges
defined in Table 1
Disabling unused channels
Adding an external heat-sink
Increasing the airflow
Z
Z
TTO
0
0
supplies of 3.3 V and 2.5 V to illustrate practical
CC
CC
and V
CC
1.8V
reduces the voltage at V
, decreasing V
TTO
OCM
Rx
), and output coupling (ac or dc) affect
= V
ASIC
CC
− V
CC
is required to maintain the
OCM
TTO
) with output level and
CC
voltages as low as 1.8 V
for improved output
L
L
(min