ADUC7033BSTZ-88-RL Analog Devices Inc, ADUC7033BSTZ-88-RL Datasheet - Page 94

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ADUC7033BSTZ-88-RL

Manufacturer Part Number
ADUC7033BSTZ-88-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheet

Specifications of ADUC7033BSTZ-88-RL

Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7033BSTZ-88-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADuC7033
GPIO Port1 Data Register
Name:
Address:
Default Value:
Access:
Function:
Table 63. GP1DAT MMR Bit Designations
Bit
31 to 26
25
24
23 to 18
17
16
15 to 2
1
0
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Port1.1 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port1.1 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port1.1 as an output.
Port1.0 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port1.0 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port1.0 as an output.
Reserved. These bits are reserved and should be written as 0 by user code.
Port1.1 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port1.1.
Port1.0 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port1.0.
Reserved. These bits are reserved and should be written as 0 by user code.
Port1.1 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port1.1. User code should
write 0 to this bit.
Port1.0 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port1.0. User code should
write 0 to this bit.
GP1DAT
0xFFFF0D30
0x000000XX
Read/write
This 32-bit MMR configures the direction of the GPIO pins assigned to Port1 (see Table 58). This register also sets the
output value for GPIO pins configured as outputs and reads the status of GPIO pins configured as inputs.
Rev. B | Page 94 of 140

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