ADUC7033BSTZ-88-RL Analog Devices Inc, ADUC7033BSTZ-88-RL Datasheet - Page 95
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ADUC7033BSTZ-88-RL
Manufacturer Part Number
ADUC7033BSTZ-88-RL
Description
Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheet
1.ADUC7033BSTZ-88.pdf
(140 pages)
Specifications of ADUC7033BSTZ-88-RL
Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7033BSTZ-88-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
GPIO Port2 Data Register
Name:
Address:
Default Value:
Access:
Function:
Table 64. GP2DAT MMR Bit Designations
Bit
31
30
29
28
27 to 26
25
24
23
22
21
20 to 18
17
16
15 to 7
6
5
4
3 to 2
1
0
Description
Reserved. This bit is reserved and should be written as 0 by user code.
Port2.6 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port2.6 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port2.6 as an output.
Port2.5 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port2.5 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port2.5 as an output. This configuration is used to support
diagnostic write capability to the high voltage I/O pins.
Port2.4 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port2.4 as an input. This configuration is used to support
diagnostic readback capability from the high voltage I/O pins (see HVCFG1[2:0]).
Set to 1 by user code to configure the GPIO pin assigned to Port2.4 as an output.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.1 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port2.1 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port2.1 as an output.
Port2.0 Direction Select Bit.
Cleared to 0 by user code to configure the GPIO pin assigned to Port2.0 as an input.
Set to 1 by user code to configure the GPIO pin assigned to Port2.0 as an output.
Reserved. This bit is reserved and should be written as 0 by user code.
Port2.6 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port2.6.
Port2.5 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port2.5.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.1 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port2.1.
Port2.0 Data Output. The value written to this bit appears directly on the GPIO pin assigned to Port2.0.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.6 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port2.6. User code
should write 0 to this bit.
Port2.5 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port2.5. User code
should write 0 to this bit.
Port2.4 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port2.4. User code
should write 0 to this bit.
Reserved. These bits are reserved and should be written as 0 by user code.
Port2.1 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port2.1. User code
should write 0 to this bit.
Port2.0 Data Input. This bit is a read-only bit that reflects the current status of the GPIO pin assigned to Port2.0. User code
should write 0 to this bit.
GP2DAT
0xFFFF0D40
0x000000XX
Read/write
This 32-bit MMR configures the direction of the GPIO pins assigned to Port2 (see Table 58). This register also sets the
output value for GPIO pins configured as outputs and reads the status of GPIO pins configured as inputs.
Rev. B | Page 95 of 140
ADuC7033