ADUC814BRU Analog Devices Inc, ADUC814BRU Datasheet - Page 23

• Manufacturer Part Number: ADUC814BRU
• Description: A/D Converter (A-D) IC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC814BRU

• Peak Reflow Compatible (260 C): No
• No. Of Bits: 12 Bit
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• No. Of Inputs: 6
• Features: +3V Or +5V Operation
• Package / Case: 28-TSSOP
• Rohs Status: RoHS non-compliant
• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 16.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 640 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-ADUC814QSZ - KIT DEV FOR ADUC814 MICROCONVRTR
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ADCCON2 (ADC CONTROL SFR 2)
The ADCCON2 (byte addressable) register controls ADC channel selection and conversion modes as detailed below.
SFR Address
SFR Power-On Default
Bit Addressable
Table 7. ADCCON2 SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
ADCI
Name
ADCI
ADCSPI
CCONV
SCONV
CS3
CS2
CS1
CS0
ADCSPI
Description
ADC Interrupt Bit.
ADCI is set at the end of a single ADC conversion cycle. If the ADC interrupt is enabled, the ADCI bit is cleared when
user code vectors to the ADC interrupt routine. Otherwise the ADCI bit should be cleared by the user code.
ADCSPI Mode Enable Bit.
ADCSPI is set to enable the ADC conversion results to be transferred directly to the SPI data buffer (SPIDAT) without
intervention from the CPU.
Continuous Conversion Bit.
CCONV is set to initiate the ADC into a continuous mode of conversion. In this mode the ADC starts converting
based on the timing and channel configuration already set up in the ADCCON SFRs. The ADC automatically starts
another conversion once a previous conversion cycle has completed. When operating in this mode from 3 V
supplies, the ADC should be configured for ADC clock divide of 16 using CK1 and CK0 bits in ADCCON1, and ADC
acquisition time should be set to four ADC clocks using AQ1, AQ0 bits in ADCCON1 SFR.
Single Conversion Bit.
SCONV is set to initiate a single conversion cycle. The SCONV bit is automatically reset to 0 on completion of the
single conversion cycle. When operating in this mode from 3 V supplies, the maximum ADC sampling rate should
not exceed 147 kSPS.
Channel Selection Bits.
CS3–CS0 allow the user to program the ADC channel selection under software control. Once a conversion is
initiated, the channel converted is pointed to by these channel selection bits.
The Channel Select bits operate as follows:
CS3
0
0
0
0
0
0
0
0
1
1
1
1
1
D8H
00H
Yes
CS2
0
0
0
0
1
1
1
1
0
0
0
0
1
CCONV
CS1
0
0
1
1
0
0
1
1
0
0
1
1
0
CS0
0
1
0
1
0
1
0
1
0
1
0
1
0
SCOVC
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CHANNEL
0
1
2
3
4
5
X
X
Temperature Sensor
DAC0
DAC1
AGND
V
REF
Not a vaild selection. No ADC channel selected.
Not a valid selection. No ADC channel selected.
CS3
CS2
CS1
ADuC814
CS0