ADUC814BRU Analog Devices Inc, ADUC814BRU Datasheet - Page 31

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ADUC814BRU

Manufacturer Part Number
ADUC814BRU
Description
A/D Converter (A-D) IC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC814BRU

Peak Reflow Compatible (260 C)
No
No. Of Bits
12 Bit
Leaded Process Compatible
No
Mounting Type
Surface Mount
No. Of Inputs
6
Features
+3V Or +5V Operation
Package / Case
28-TSSOP
Rohs Status
RoHS non-compliant
Core Processor
8052
Core Size
8-Bit
Speed
16.78MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADUC814QSZ - KIT DEV FOR ADUC814 MICROCONVRTR
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC814BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
USING FLASH/EE PROGRAM MEMORY
The Flash/EE program memory array can be programmed in
one of two modes: serial downloading and parallel
programming.
Serial Downloading (In-Circuit Programming)
As part of its factory boot code, the ADuC814 facilitates code
download via the standard UART serial port. Serial download
mode is automatically entered on power-up or during a
hardware RESET operation if the external DLOAD pin is pulled
high through an external resistor, as shown in Figure 34. Once
in this mode, the user can download code to the program
memory array while the device is sited in its target application
hardware. A PC serial download executable is provided as part
of the ADuC814 QuickStart development system. The Serial
Download protocol is detailed in a MicroConverter Applications
Note uC004 available from the ADI MicroConverter website at
www.analog.com/microconverter.
Parallel Programming
The parallel programming mode is fully compatible with
conventional third-party Flash or EEPROM device program-
mers. A block diagram of the external pin configuration
required to support parallel programming is shown in Figure 35.
The high voltage (12 V) supply required for Flash/EE
programming is generated using on-chip charge pumps to
supply the high voltage program lines.
Figure 34. Flash/EE Memory Serial Download Mode Programming
ADuC814
DLOAD
DVDD
1kΩ
PULL DLOAD HIGH VIA
1kΩ RESISTOR DURING
RESET TO CONFIGURE
THE ADuC814 FOR
SERIAL DOWNLOAD MODE
Rev. A | Page 31 of 72
FLASH/EE PROGRAM MEMORY SECURITY
The ADuC814 facilitates three modes of Flash/EE program
memory security, which are described in the following sections.
These modes can be independently activated, restricting access
to the internal code space. These security modes can be enabled
as part of the user interface available on all ADuC814 serial or
parallel programming tools referenced on the MicroConverter
website at www.analog.com/microconverter.
Lock Mode
This mode locks code in memory, disabling parallel program-
ming of the program memory, although reading the memory in
parallel mode is still allowed. This mode is deactivated by
initiating a CODE-ERASE command in serial download or
parallel programming modes.
Secure Mode
This mode locks code in memory, disabling parallel program-
ming (program and VERIFY/READ commands). This mode is
deactivated by initiating a CODE-ERASE command in serial
download or parallel programming modes.
Serial Safe Mode
This mode disables serial download capability on the device. If
serial safe mode is activated and an attempt is made to reset the
part into serial download mode, i.e., RESET asserted and de-
asserted with DLOAD high, the part interprets the serial
download reset as a normal reset only. It therefore does not
enter serial download mode but only executes a normal reset
sequence. Serial safe mode can be disabled only by initiating a
CODE-ERASE command in parallel programming mode.
COMMAND
TIMING
Figure 35. Flash/EE Memory Parallel Programming
5V
V
GND
P1.1–P1.4
P1.5–P1.7
DD
ADuC814
DLOAD
RESET
P1.0
P3
DATA
GND
V
ENABLE
ADuC814
DD

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